# Electrical Technology Grade 12 NSC November 2018 Memo (Eng)

> Grade 12 Electrical Technology memorandum from the NSC November Exam 2018 (English), 16 pages. Read online or download the free PDF.

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- Updated: 2026-09-27
- Subject: Electrical Technology
- Grade: Grade 12
- Document type: Memorandum
- Year: 2018
- Exam period: NSC November Exam
- Curriculum: CAPS
- Pages: 16

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Electrical Technology · Grade 12 · NSC November Exam · 2018. Memorandum, 16 pages. Read online or download the PDF.

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## Document text

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                                     GRAAD 12

                                    NATIONAL
                               SENIOR CERTIFICATE

                                     GRADE 12

                     ELECTRICAL TECHNOLOGY: ELECTRONICS

                                   NOVEMBER 2018

                                MARKING GUIDELINES

MARKS: 200

                      These marking guidelines consist of 16 pages.

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Electrical Technology: Electronics               2                          DBE/November 2018
                                      NSC – Marking Guidelines

INSTRUCTIONS TO THE MARKERS

1.        All questions with multiple answers imply that any relevant, acceptable
          answer should be considered.

2.        Calculations:

          2.1         All calculations must show the formulae.

          2.2         Substitution of values must be done correctly.

          2.3         All answers MUST contain the correct unit to be considered.

          2.4         Alternative methods must be considered, provided that the correct
                      answer is obtained.

          2.5         Where an incorrect answer could be carried over to the next step,
                      the first answer will be deemed incorrect. However, should the
                      incorrect answer be carried over correctly, the marker has to re-
                      calculate the values, using the incorrect answer from the first
                      calculation. If correctly used, the candidate should receive the full
                      marks for subsequent calculations.

          2.6         Markers should consider that learner answers may deviate slightly
                      from the guideline; depending on how and where in the calculation
                      rounding off was used.

3.        These marking guidelines are only a guide with model answers. Alternative
          interpretations must be considered and marked on merit. However, this
          principle should be applied consistently throughout the marking session at
          ALL marking centres.

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Electrical Technology: Electronics               3                              DBE/November 2018
                                      NSC – Marking Guidelines

QUESTION 1: OCCUPATIONAL HEALTH AND SAFETY

1.1       'Major incident 'is an occurrence of catastrophic proportionü resulting from
          the use of plant and machinery from activities in the workplace. ü
          Severe or serious injury or great damage to machinery and persons resulting
          from the use of plant or machinery in a workplace.                                          (2)

1.2       Manufacturers must ensure that products are safe ü
          Not permitting any employee to do any work or to produce any artefact unless
          precautionary measures are in place. ü
          Safe to use / without risk to health
          Safety feature
          Instructional manual
          Good state or design without a fault.                                                       (2)

1.3       'Horseplay' is an unsafe act because it is an inappropriate behaviour by
          learners ü in the workshop that would compromise the safety ü of
          themselves and others.
          It distracts others that could lead to accidents or incidents.                              (2)

1.4       Do not touch the person. ü
          Switch off the supply. ü
          Help the person by removing him/her with a type of insulation material.                     (2)

1.5       Qualitative risk analysis defines the levels of threat ü and devises counter-
          measures ü to eliminate possible risk.                                                      (2)
                                                                                                      [10]

QUESTION 2: RLC CIRCUITS

2.1       The total opposition to the flow of alternating current ü in a circuit comprising
          of resistance and reactance. ü                                                              (2)

2.2       2.2.1
                                                  VC ü
                                             I                              ü

                                                 90°   180°   270°   360°

                                                                                                      (2)
                     If the learner drew only one signal, it doesn’t show relation. (no
                     marks)

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Electrical Technology: Electronics                      4                         DBE/November 2018
                                             NSC – Marking Guidelines

          2.2.2                                             ü
                                                      VL
                                                                I   ü

                                                      90°   180°    270°   360°

                                                                                                        (2)
                     NOTE. If the learner drew only one signal, it doesn’t show relation.
                     (no marks)

2.3       2.3.1                    1                  ü
                     C=
                            2 × π × f × Xc
                                 1                    ü
                        =
                          2 × π × 60 × 36
                        = 73,68 μF                    ü
                                                                                                        (3)

                     NOTE. Note if the formula is copied directly from the formula sheet a
                     mark must be awarded, there after the substitution, manipulation and
                     the answer must be correct to receive 3 marks.

          2.3.2              XL
                     L=                      ü
                         2 × π × 60
                             22
                       =                     ü
                         2 × π × 60
                       = 58,35 mH            ü                                                          (3)
                     NOTE. Note if the formula is copied directly from the formula sheet a
                     mark must be awarded, there after the substitution, manipulation and
                     the answer must be correct to receive 3 marks.

          2.3.3      Z = R 2 + (XL − XC )2            ü

                        = 122 + (36 − 22)2            ü
                        = 18,44 Ω
                                                      ü                                                 (3)

          2.3.4          VS                           ü
                     I=
                          Z
                                                      ü
                           60
                       =
                         18.44                        ü
                       = 3,25 A                                                                         (3)

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Electrical Technology: Electronics                 5                     DBE/November 2018
                                        NSC – Marking Guidelines

          2.3.5      Q = V × I × Sinθ                     ü
                        = 60 × 3,25 × Sin 50 ( )
                                               ο
                                                          ü
                        = 149,38 VA r                     ü                                    (3)

2.4       The value of the inductive reactance will double/increase ü because the
          inductive reactance is directly proportional to the frequency ü of the supply
          voltage.
          NOTE. If only the formula is given, no marks.
          If the formula is given as a reason, 1 mark will be awarded for the formula.         (2)

2.5.      The resonant frequency is the frequency at which the inductive reactance ü is
          equal to the capacitive reactance. ü
          NOTE. All characteristics of resonance explained correctly will be accepted.         (2)

2.6       a.                  VS
                      XL =                         ü
                              IL
                            100                    ü
                          =
                             2
                          = 50 Ω                   ü                                           (3)

          b.                  VS
                      XC =                         ü
                              IC
                            100                    ü
                          =
                             6
                          = 16,67 Ω                ü                                           (3)

          c.         I X = IC − IL                 ü
                                                   ü
                       = 6−2
                       =4A                      ü                                              (3)
                     NOTE. If the learner stated either one or a difference in reactive
                     currents is stated, the learner must be awarded 3 marks.

          d.                   2
                     IT = IR + (IC − IL )2
                                                   ü

                        = 5 2 + (6 − 2)2           ü
                        = 6,4 A
                                                   ü                                           (3)

          2.6.2      Phase angle is leading. ü                                                 (1)

2.7       A low value of resistance produces a high Q-factor ü which results in a low
          bandwidth ü and high selectivity.                                                    (2)
                                                                                               [40]

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Electrical Technology: Electronics               6                             DBE/November 2018
                                      NSC – Marking Guidelines

QUESTION 3: SEMICONDUCTOR DEVICES

3.1       N-channel JFET or NFET ü
          P-channel JFET or PFET ü                                                                    (2)

3.2       To overcome leakage current between the gate terminal and Drain-Source
          channel, the gate terminal is electrically isolated from the channel ü by
          means of an extremely narrow layer of metal-oxide-silicon ü (MOS).                          (2)

3.3       3.3.1      Enhancement-mode ü N-channel ü MOSFET                                            (2)

          3.3.2      The lamp will switch ON as soon as the gate voltage V GS is raised
                     ü to a sufficient level which will forward bias the internal channel of
                     the MOSFET. ü                                                                    (2)

          3.3.3      If R GS is short circuited, it will cause the internal conductive channel
                     of the MOSFET to disperse, ü cutting the current flow ü and
                     switching the lamp OFF. ü                                                        (3)

                     If RGS is short circuited, the gate of the MOSFET will be tied
                     directly to ground (0V potential), causing the internal channel to
                     close and switch the lamp off.

3.4       3.4.1      Saturation region ü                                                              (1)

          3.4.2      At point C the UJT triggers ON. As the UJT is triggered, its internal
                     resistance and voltage ü will decrease ü while current increases. ü
                     This is contrary to Ohm's law and is called negative resistance.                 (3)

3.5       3.5.1      Darlington pair ü                                                                (1)

          3.5.2      Very high current gain ü
                     Improved input impedance ü
                     When used in common collector pair it develops a very low output
                     impedance                                                                        (2)

3.6       3.6.1      Non-inverting input ü                                                            (1)

          3.6.2      Dual-in-line package outline (DIP) ü
                     Surface mount package (SMP)                                                      (1)

          3.6.3                                                  ü
                                           +V

                                           0V
                                                    90°          270°

                                           -V
                                                    ü                                                 (2)

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Electrical Technology: Electronics              7                             DBE/November 2018
                                     NSC – Marking Guidelines

                     Note. If a square wave is drawn and it shows the correct inversion,
                     2 marks will be awarded.

3.7       •     Open loop gain is the gain of an Op-Amp without any feedback ü from
                the output to the input.
          •     Closed loop gain is the gain of an Op-Amp with feedback ü from the
                output to the input.                                                                (2)

3.8                       R 
           VOUT = VIN 1 + F            ü
                        RIN 
                               220 000 
                  = 5 × 10 −3 1 +      
                                  440  ü
                  = 2,51 V
                                          ü                                                         (3)

3.9       •     Trigger pin 2 is an active low trigger. ü
          •     When the voltage on pin 2 is less than 1/3 of the supply voltage, the
                output goes high. ü
          •     When the voltage is higher than 2/3 of the supply voltage, the output
                resets. ü                                                                           (3)
                                                                                                    [30]

QUESTION 4: SWITCHING CIRCUITS

4.1       An astable multivibrator generates a continuous train ü of (clock) pulses ü
          without the need of a trigger pulse.
          Continuously changes its state from high to low and back (2 marks)
          Continuously switches something on and off. (2 marks)                                     (2)

4.2       4.2.1      Bistable multivibrator ü                                                       (1)

          4.2.2      Positive feedback ü                                                            (1)

          4.2.3      When a positive pulse (trigger pulse 1) is applied to the Trigger input,
                     the output will change to a negative (-V) ü and remain there until a
                     negative pulse (trigger pulse 2) is applied. ü When a negative pulse
                     is applied to the trigger input, the output will change to positive. ü         (3)

4.3       4.3.1      Clock pulse generator ü
                     Morse code generators
                     Timers
                     Amateur radio equipment
                     Systems that require square wave                                               (1)

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Electrical Technology: Electronics                  8                                    DBE/November 2018
                                         NSC – Marking Guidelines

          4.3.2
                                              VOUT

                                               +V
                                                             ü
                                                                    ü
                                              0V
                                                                                 t
                                                             t1     t2                                           (2)

          4.3.3      If the value of R 1 is increased, the RC time constant of the charging
                     circuit (t 1 ) increases, ü keeping the output of the 555 IC high for
                     longer. ü This means that the positive output pulse (high) will be
                     longer than the negative output pulse (low). ü                                              (3)

                     When the first trigger pulse is applied, Pin 7 of the 555 will be pulled
                     (set) high to allow the capacitor to start charging. The charging
                     period of the capacitor will only end once it has reached 2/3 Vcc, and
                     any other further applied pulses during this period will be of no
                     effect.

 4.4      4.4.1                      A                   B
                          +VS

                                                                                     Trigger pulse

                          0V
                                                                             t

                         ⅔ VS

                                                                                     Capacitor charging
                          0V
                                                                             t

                                     ü               ü   ü               ü
                         +VS

                                                                                     Output

                          0V
                                                                             t
                                                                                                                 (4)
                     NOTE. Inverted polarity with correct intervals minus two marks

          4.4.2      Trigger pulse B appears like a train of 'on' - 'off' pulses ü which is
                     known as contact switch bounce. ü
                     Switch bounce (2 marks)                                                                     (2)

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Electrical Technology: Electronics                   9                         DBE/November 2018
                                          NSC – Marking Guidelines

          4.4.3      The application of additional short pulses, ü after the initial set pulse
                     will not affect the mono-stable multivibratorü that is already in the
                     set stateü and hence will not affect the charging of the capacitor              (3)

                     When the first trigger pulse is applied, Pin 7 of the 555 will be pulled
                     (set) high to allow the capacitor to start charging. The charging
                     period of the capacitor will only end once it has reached 2/3 Vcc, and
                     any other further applied pulses during this period will be of no
                     effect.

 4.5      4.5.1      Thermo-couple ü
                     Piezzo sensor ü
                     Microphone                                                                      (2)

          4.5.2
                                 +1 V                                 Upper
                                                                      trigger level

                                                                      Lower
                                 -1 V                                 trigger level

                                          ü      ü         ü     ü
                                     +V

                                     -V
                                                                                                     (4)

          4.5.3      When R 1 is decreased the feedback voltage VR 1 is decreased. ü As
                     a result the positive feedback through R 1 is decreased, ü lowering
                     the trigger threshold voltage. ü                                                (3)

 4.6      4.6.1      The purpose of the comparator is to compare two input voltages. ü               (1)

          4.6.2      A comparator compares the two voltages appearing at the two input
                     terminals. ü When one of its two input voltages is greater than the
                     other, the output will go into one of the two saturation states. ü
                     When the inputs are reversed the output switches to the other
                     saturation state. ü                                                             (3)

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Electrical Technology: Electronics                      10                                          DBE/November 2018
                                              NSC – Marking Guidelines

          4.6.3                                    VIN

                        VREF

                         0V

                       +VSAT
                                         ü                   ü

                                                   ü
                       -VSAT
                                                                                                                            (3)

 4.7      4.7.1                         Rf          Rf          Rf 
                      VOUT = −  V1          + V2        + V3   ü   
                                        R1          R2          R 3 
                                                                                                           ü3
                                            −3 100 × 10
                                                          3
                                                                       −3 100 × 10
                                                                                    3
                                                                                                −3 100 × 10 
                             = −  100 × 10                + 150 × 10                + 50 × 10               
                                                10 × 10 3                 30 × 10 3                5 × 10 3 
                             = − 2,5 V ü
                                                                                                                            (3)
                     OR
                                    Rf           R            R 
                      VOUT = V1 ×  −   + V2 ×  − f  + V3 ×  − f 
                                    R1           R            R 
                                                     2            3
                                               100 × 10 3                   100 × 10 3                            3
                            = 100 × 10 −3 ×  −            + 150 × 10 −3
                                                                           × −            + 50 × 10 −3 ×  − 100 × 10 
                                                        3                    30 × 10 3                   5 × 10 3 
                                               10 × 10                                                             
                            = − 2,5 V

          4.7.2      The voltage of each signal can be controlled independently by
                     replacing each input resistor ü with a variable resistor ü                                             (2)

          4.7.3      DC blocking capacitors ü must be connected at the inputs ü to
                     prevent dc current from being fed back to the input voltage sources.                                   (2)

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Electrical Technology: Electronics               11                                     DBE/November 2018
                                       NSC – Marking Guidelines

          4.7.4

                                                         100 mV
                                                                                    t

                                                         150 mV
                                                                                    t

                                                          50 mV
                                                                                    t

                                                                             ü
                                                        ü
                                                        V
                                              VOUT = 2.5Vout
                                                                                    t

                                                                      ü

                     ONE mark for CORRECT POLARITY
                     ONE mark for AMPLIFICATION
                     If the wave form does not depict the wave size but there is reference
                     to the correct value of the wave, a mark must be awarded                                  (2)

 4.8      4.8.1
                                       V IN

                                      0 V
                                                                                        t

                                     V OUT                        ü

                                      0 V          90°     180°       270°   360°
                                                                                        t

                                              ü
                                                                             ü
                     1 mark for 90° phase shift
                     Correct orientation of which will be:
                     • 1 mark for positive half
                     • 1 mark for negative half                                                                (3)

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Electrical Technology: Electronics               12                               DBE/November 2018
                                       NSC – Marking Guidelines

          4.8.2      Triangular wave
                                                IN

                                               0V
                                                                          t

                                               OUT
                                                          ü
                                               0V
                                                                          t
                                                     ü                ü
                     1 mark for phase shift
                     2 marks for correct orientation                                                    (3)

 4.9      4.9.1
                                         VIN

                                        0V
                                                                              t

                                        0V
                                                                              t
                                                 ü         ü      ü
                                          -V                                                            (3)

          4.9.2      The textbook only mentioned the passive integrator of which the
                     following will be accepted.
                     If the RC time constant is short, the capacitor will charge rapidly ü
                     reaching the maximum input voltage and remaining there ü until the
                     input falls again. This results in the output having rounded leading
                     and trailing edges ü with a flat top resembling a distorted square
                     wave. ü                                                                            (4)

                     The following is the correct response for the Op-amp integrator.

                     If the RC time constant is short, the output will rise in a linear
                     manner until reaching the maximum output voltage and remaining
                     there until the input falls again. This results in the output having
                     straight sloping leading and trailing edges with flat tops and bottoms.
                     It will resemble a triangular wave with its top and bottom peaks cut
                     off.

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                                     NSC – Marking Guidelines

                                                                                                     [60]

QUESTION 5: AMPLIFIERS

5.1      Class A - the transistor is biased with the Q-point on the midpoint ü of the load
         line, allowing for the full signal (360°) to be amplified. ü                                (2)
5.2
         5.2.1    To set the operating conditions (points) of the transistor. ü
                  To stabilise the operating point of the transistor. ü                              (2)

         5.2.2    Q-point on the DC load line represents the voltages across the
                  transistor ü and current through the transistorü when no input signal is
                  applied. ü                                                                         (3)

         5.2.3         IC

                                          Class A ü

                                                         Class B ü
                                                                                      VCE
                                                                Class C ü
                                                                                                     (3)
         Note. If the reference base biasing current is drawn and Q-point for class B is
         drawn slightly above line V CE , that mark will be awarded.

5.3      5.3.1    C 2 serves as the AC coupling component between the two stages. ü
                  C 2 also blocks or decouples the DC component of the signal. ü                     (2)

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Electrical Technology: Electronics             14                           DBE/November 2018
                                     NSC – Marking Guidelines

         5.3.2    •   When an AC voltage is applied to the input of the first amplifier
                      stage, üan alternating current will flow in the collector circuit of
                      transistor (Q 1 ). ü
                  •   An alternating voltage will develop across the collector resistor
                      (R C1 ). ü
                  •   The developed alternating voltage across the R C1 will be transferred
                      through capacitor C 2 ü to the base of the transistor(Q 2 ) in the
                      amplifier 's second stage(stage 2). ü
                  •   The process will be repeated and the amplified output will
                      measured between C 3 and 0 V. ü                                              (6)

         5.3.3    Impedance matching ü
                  Correct frequency response ü
                  DC isolation.                                                                    (2)

5.4      5.4.1     Frequency response is the ability of the circuit ü to respond to a range
                   of frequencies applied to the transistor. ü                                     (2)

         5.4.2     NOTE: The response given in the text book is wrong but marks will be
                   awarded as such:

                   Half-power points (-3dB) is the point when the output ü is at half the
                   input power. ü                                                                  (2)

                   The correct response is as follows:

                   The half-power point is the points at which the output power has
                   dropped to half of its peak value; that is, at a level of -3 dB.

         5.4.3     At lower frequencies the reactances of the decoupling capacitors
                   across the emitter resistors rises. ü These reactances each combine
                   with the resistance of their emitter resistors, causing the total
                   impedance to rise ü limiting the stage gain. ü                                  (3)

5.5      5.5.1     Impedance matching can be achieved by selecting a transformer ü
                   with the required number of turns ü that will coincide with the
                   impedances of the respective stages.                                            (2)

         5.5.2     The reason for using a transformer is that the relatively high output
                   impedance of the second stage ü is connected to the relatively low
                   impedance of the speaker ü thus matching the output impedance ü of
                   the amplifier to the load.                                                      (3)

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Electrical Technology: Electronics                      15                            DBE/November 2018
                                              NSC – Marking Guidelines

         5.5.3                                                      ü
                                                             Resonant    Q
                                 ü
                         ü Low Frequency                       rise
                     Vgain                              ü
                               roll-off          Flat response

                        1
                                                                                             ü
                     -3 dB
                                                                                      High Frequency
                                                                                          roll-off

                                                                                       f (Hz)
                                     f CO 1                                  f CO 2      ü                  (6)

5.6      5.6.1    An oscillator is a device which generates an AC output signal ü without
                  any externally applied input signal. ü                                                    (2)

         5.6.2    Sine wave ü                                                                               (1)

         5.6.3    Positive feedback ü                                                                       (1)

         5.6.4    The resistors R 1 and R 2 form a voltage divider ü to bias the base of
                  the transistor. ü                                                                         (2)

         5.6.5    The Colpitts oscillator uses TWO capacitors and an inductor in the tank
                  circuit. ü
                  The Hartley oscillator uses TWO inductors and a capacitor in the tank
                  circuit. ü                                                                                (2)

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Electrical Technology: Electronics                 16                             DBE/November 2018
                                         NSC – Marking Guidelines

5.7      5.7.1    The transistor is used to amplify the damped oscillating signal ü
                  ensuring a gain of 1 thus maintaining oscillation.
                  Provide phase shift of 180°. ü                                                      (2)

         5.7.2    The RC-network provides a phase shift of 180° ü and the amplifier
                  circuit provides a phase shift of -180°. ü                                          (2)

         5.7.3
                            +V

                                          ü

                                              180       360
                              0
                                                                          t
                                                          ü

                            -V
                                                                                                      (2)

         5.7.4    No external input signal is applied to oscillators.ü
                  The circuit is self-maintained.
                  An input signal is required in the transistor amplifier.ü                           (2)

5.8      The RF-oscillator may be used in:
         Local oscillators ü
         Radio circuits ü
         Signal generator                                                                             (2)

5.9                                  ü
                           +V

                                                              ü

                                                                              t
                              0
                                     1800           360       540         720
                                     ü
                                                                    ü

                            -V                      ü

         1 mark for constant frequency.
         3 marks each half cycle with smaller amplitude.                                              (4)
                                                                                                      [60]

                                                                                       TOTAL:         200

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## Collection

- [Grade 12 past papers](https://www.hlayiso.com/grade-12/past-papers)

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