# Electrical Technology Grade 12 NSC November 2019 QP (Eng) > Grade 12 Electrical Technology question paper from the NSC November Exam 2019 (English), 23 pages. Read online or download the free PDF. - Page: https://www.hlayiso.com/library/electrical-technology-nov-2019-electronics-eng/e0755867-bde2-4b5f-afa5-e12964a3e184 - Updated: 2026-09-27 - Subject: Electrical Technology - Grade: Grade 12 - Document type: Question paper - Year: 2019 - Exam period: NSC November Exam - Curriculum: CAPS - Pages: 23 Breadcrumbs: [Home](https://www.hlayiso.com/) › [Library](https://www.hlayiso.com/library) › [Grade 12](https://www.hlayiso.com/library/grade-12) › [Electrical Technology](https://www.hlayiso.com/library/grade-12/electrical-technology) › [Electrical Technology Grade 12 NSC November 2019 QP (Eng)](https://www.hlayiso.com/library/electrical-technology-nov-2019-electronics-eng/e0755867-bde2-4b5f-afa5-e12964a3e184) ## About this document Electrical Technology · Grade 12 · NSC November Exam · 2019. Question paper, 23 pages. Read online or download the PDF. Read it free online on the page above; download the PDF from there. ## Document text Text extracted from the PDF. Layout, diagrams and tables may not survive extraction. ### Page 1 Downloaded from hlayiso.com GRAAD 12 NATIONAL SENIOR CERTIFICATE GRADE 12 ELECTRICAL TECHNOLOGY: ELECTRONICS NOVEMBER 2019 MARKS: 200 TIME: 3 hours This question paper consists of 16 pages, a 1-page formula sheet and 6 answer sheets. Copyright reserved Please turn over ### Page 2 Downloaded from hlayiso.com Electrical Technology: Electronics 2 DBE/November 2019 NSC INSTRUCTIONS AND INFORMATION 1. This question paper consists of FIVE questions. 2. Answer ALL the questions. 3. Answer the following questions on the attached ANSWER SHEETS: QUESTION 2.3.4 QUESTION 3.4.3 QUESTIONS 4.1.2, 4.4.2, 4.6.2 and 4.7.3 QUESTIONS 5.4.1, 5.4.2, 5.6.4, 5.6.5 and 5.11.4 4. Write your CENTRE NUMBER and EXAMINATION NUMBER on every ANSWER SHEET and hand them in with your ANSWER BOOK, whether you have used them or not. 5. Sketches and diagrams must be large, neat and FULLY LABELLED. 6. Show ALL calculations and round off answers correctly to TWO decimal places. 7. Number the answers correctly according to the numbering system used in this question paper. 8. You may use a non-programmable calculator. 9. Calculations must include: 9.1 Formulae and manipulations where needed 9.2 Correct replacement of values 9.3 Correct answer and relevant units where applicable 10. A formula sheet is attached at the end of this question paper. 11. Write neatly and legibly. Copyright reserved Please turn over ### Page 3 Downloaded from hlayiso.com Electrical Technology: Electronics 3 DBE/November 2019 NSC QUESTION 1: OCCUPATIONAL HEALTH AND SAFETY 1.1 Describe how teamwork improves work ethics. (2) 1.2 With reference to the Occupational Health and Safety Act, 1993 (Act 85 of 1993): 1.2.1 State TWO purposes of the Occupational Health and Safety Act, 1993 (Act 85 of 1993). (2) 1.2.2 Define the term workplace. (2) 1.3 An employer has a duty to report on occupational health and safety and related matters. Name ONE person they should inform when: 1.3.1 The allocated task is hazardous (1) 1.3.2 A major incident occurs (1) 1.4 State TWO general emergency procedures to be followed when the emergency siren is sounded at school. (2) [10] QUESTION 2: RLC CIRCUITS 2.1 Define the following with reference to RLC circuits: 2.1.1 Power factor (2) 2.1.2 Q-factor of an inductor in a resonant circuit (2) 2.2 State TWO applications of RLC circuits. (2) 2.3 FIGURE 2.3 below shows an RLC series circuit. Answer the questions that follow. R L C VR = 12 V VL = 16 V VC = 24 V IT = 3 A 60 Hz FIGURE 2.3: RLC SERIES CIRCUIT Given: IT = 3A VR = 12 V VL = 16 V VC = 24 V f = 60 Hz Copyright reserved Please turn over ### Page 4 Downloaded from hlayiso.com Electrical Technology: Electronics 4 DBE/November 2019 NSC 2.3.1 Calculate the total voltage of the supply. (3) 2.3.2 Calculate the value of the inductive reactance. (3) 2.3.3 State if the circuit is capacitive or inductive. Motivate your answer. (2) 2.3.4 Complete the phasor diagram on the ANSWER SHEET for QUESTION 2.3.4 and show the direction of rotation. (4) 2.3.5 Describe how an increase in impedance, while keeping the resistance constant, will affect the phase angle and the power factor. (2) 2.4 FIGURE 2.4 below shows an RLC parallel circuit consisting of a 20 Ω resistor, an inductor with an inductive reactance of 30 Ω and a capacitor with a capacitive reactance of 40 Ω, all connected across a 120 V/60 Hz supply. Answer the questions that follow. IT IR = 6 A IL = 4 A IC = 3 A 120 V R = 20 Ω XL = 30 Ω XC = 40 Ω 60 Hz FIGURE 2.4: RLC PARALLEL CIRCUIT Given: R = 20 Ω XL = 30 Ω XC = 40 Ω VT = 120 V f = 60 Hz 2.4.1 Calculate the total current in the circuit. (3) 2.4.2 Calculate the phase angle. (3) 2.4.3 State whether the phase angle is leading or lagging. Motivate your answer. (2) Copyright reserved Please turn over ### Page 5 Downloaded from hlayiso.com Electrical Technology: Electronics 5 DBE/November 2019 NSC 2.5 FIGURE 2.5 below shows an RLC series resonant circuit which consists of a 12 Ω resistor, an inductor with an inductive reactance of 50 Ω and a variable capacitor, all connected across a 120 V/2 kHz supply. Answer the questions that follow. R = 12 Ω XL = 50 Ω C 120 V/2 kHz FIGURE 2.5: RLC SERIES RESONANT CIRCUIT Given: VT = 120 V f = 2 kHz R = 12 Ω XL = 50 Ω 2.5.1 Calculate the value of C when the circuit resonates at 2 kHz. (4) 2.5.2 Calculate the value of the current in the circuit. (4) 2.5.3 State how current will be affected if the value of the resistance is doubled. (1) 2.5.4 List THREE characteristics of an RLC series circuit at resonance. (3) [40] Copyright reserved Please turn over ### Page 6 Downloaded from hlayiso.com Electrical Technology: Electronics 6 DBE/November 2019 NSC QUESTION 3: SEMICONDUCTOR DEVICES 3.1 Name the type of material used for the gate terminal in a P-channel JFET. (1) 3.2 Draw a neatly labelled symbol of an N-channel JFET. (3) 3.3 Study the symbol in FIGURE 3.3 below and answer the questions that follow. D G S FIGURE 3.3: FIELD-EFFECT TRANSISTOR 3.3.1 State whether the field-effect transistor (FET) in FIGURE 3.3 is a P-channel or an N-channel. (1) 3.3.2 List THREE conditions for the correct biasing of the transistor in FIGURE 3.3. (3) 3.4 Refer to FIGURE 3.4 below and answer the questions that follow. t R1 R2 VB2 E B2 VC B1 C R3 FIGURE 3.4: UJT AS A SAWTOOTH GENERATOR 3.4.1 Besides a sawtooth generator, name ONE other application of a UJT. (1) 3.4.2 Explain what causes the UJT to trigger ON in the circuit. (2) 3.4.3 Draw the output waveform between points B1 and ground on the ANSWER SHEET for QUESTION 3.4.3. (3) Copyright reserved Please turn over ### Page 7 Downloaded from hlayiso.com Electrical Technology: Electronics 7 DBE/November 2019 NSC 3.5 Refer to FIGURE 3.5 below and answer the questions that follow. 741 FIGURE 3.5: 741 OP-AMP 3.5.1 State how you would identify pin 1 of the IC in FIGURE 3.5. (1) 3.5.2 List the THREE stages into which the internal circuit of the op-amp is divided. (3) 3.6 FIGURE 3.6 below shows the op-amp as an inverting amplifier. Answer the questions that follow. RF = 100 kΩ +15 V V 2V RIN = 12 kΩ _ t t VIN + VOUT 0V -15 V FIGURE 3.6: INVERTING OP-AMP Given: VIN = 2V RF = 100 kΩ RIN = 12 kΩ 3.6.1 Calculate the output voltage based on the data in FIGURE 3.6. (3) 3.6.2 Explain why the shape of the output waveform is NOT an exact replica of the input waveform. (2) 3.6.3 Identify the maximum output voltages (Vout). (2) Copyright reserved Please turn over ### Page 8 Downloaded from hlayiso.com Electrical Technology: Electronics 8 DBE/November 2019 NSC 3.7 Refer to the data sheet in FIGURE 3.7 below and answer the questions that follow. FIGURE 3.7: DATA SHEET 3.7.1 Rewrite the abbreviation DIP in full. (1) 3.7.2 Write down the maximum supply voltage for the NE555 IC. (1) 3.7.3 Identify the typical trigger voltage of the NE555 IC, in the data sheet above, when the supply voltage is +15 V. (1) 3.8 Explain what will happen to the output of an NE555 IC when the trigger voltage rises above the threshold voltage level of 10 V. (2) [30] Copyright reserved Please turn over ### Page 9 Downloaded from hlayiso.com Electrical Technology: Electronics 9 DBE/November 2019 NSC QUESTION 4: SWITCHING CIRCUITS 4.1 Refer to FIGURE 4.1 below and answer the questions that follow. Input Multivibrator Output +Vout T1 A -Vout T2 T1 T2 +Vout B T1 -Vout T1 Astable No input signal C Multivibrator FIGURE 4.1: MULTIVIBRATORS 4.1.1 Identify multivibrators A and B. (2) 4.1.2 Draw the output signal of the astable multivibrator at C on the ANSWER SHEET for QUESTION 4.1.2. (2) 4.2 Refer to the circuit in FIGURE 4.2 below and answer the questions that follow. +6V R1 R2 10 kΩ 10 kΩ R3 8 330 Ω 4 7 555 3 6 2 1 5 S1 S2 Set Reset LED C2 10 nF FIGURE 4.2: BISTABLE MULTIVIBRATOR 4.2.1 State the function of R1 and R2. (2) 4.2.2 Describe what happens when the set switch, S1, is pressed. (3) 4.2.3 Explain why threshold pin 6 is connected directly to ground. (3) Copyright reserved Please turn over ### Page 10 Downloaded from hlayiso.com Electrical Technology: Electronics 10 DBE/November 2019 NSC 4.3 Refer to FIGURE 4.3 below and answer the questions that follow. Upper trigger level Input V t Lower trigger level +VCC Output V t -VCC FIGURE 4.3: SCHMITT TRIGGER INPUT AND OUTPUT 4.3.1 State whether the output signal represents an inverting or a non-inverting Schmitt trigger. Motivate your answer. (3) 4.3.2 Draw the circuit diagram of the Schmitt trigger consisting of two resistors and a 741 op-amp that will produce the output signal in FIGURE 4.3. (7) 4.4 Refer to FIGURE 4.4 below and answer the questions that follow. +V R1 +V V VIN VIN VREF 741 VOUT 0 t -V R2 FIGURE 4.4: OP-AMP CIRCUIT DIAGRAM 4.4.1 Identify the op-amp circuit diagram in FIGURE 4.4. (2) 4.4.2 Draw the output signal on the ANSWER SHEET for QUESTION 4.4.2 (4) 4.4.3 Explain how the reference voltage is made negative. (2) Copyright reserved Please turn over ### Page 11 Downloaded from hlayiso.com Electrical Technology: Electronics 11 DBE/November 2019 NSC 4.5 Refer to FIGURE 4.5 below and answer the questions that follow. R1 20 kΩ RF 100 kΩ 300 mV R2 20 kΩ +10 V V1 500 mV - V2 R3 20 kΩ + 400 mV VOUT -10 V V3 0V FIGURE 4.5: INVERTING SUMMING AMPLIFIER Given: V1 = 300 mV V2 = 500 mV V3 = 400 mV RF = 100 kΩ R1 = R2 = R3 = 20 kΩ 4.5.1 Explain how the gain of this amplifier can be determined. (3) 4.5.2 Calculate the output voltage of the amplifier. (3) 4.5.3 Give a reason why the amplifier is NOT saturated. (2) 4.5.4 Calculate the gain of the amplifier using voltage values. (3) 4.5.5 Explain the advantage of using a variable resistor in the feedback loop instead of a fixed resistor. (2) 4.5.6 Describe what will happen to the output voltage if the value of R 2 is changed to 10 kΩ. (2) Copyright reserved Please turn over ### Page 12 Downloaded from hlayiso.com Electrical Technology: Electronics 12 DBE/November 2019 NSC 4.6 Refer to FIGURE 4.6 below and answer the questions that follow. C +V R Output Input 0 t FIGURE 4.6: CIRCUIT DIAGRAM 4.6.1 Identify the circuit diagram in FIGURE 4.6. (2) 4.6.2 Draw the output signal on the ANSWER SHEET for QUESTION 4.6.2 for the given circuit time constant. (3) 4.6.3 Explain how the output will be affected if the circuit time constant is increased. (2) 4.7 Refer to FIGURE 4.7 below and answer the questions that follow. IF CF RIN +V IIN VOUT -V FIGURE 4.7: OP-AMP AS INVERTING INTEGRATOR 4.7.1 State the purpose of CF. (1) 4.7.2 Name THREE key operating points of the circuit in FIGURE 4.7. (3) 4.7.3 Draw the output signal on the ANSWER SHEET for QUESTION 4.7.3 if the signal below is applied to the input. VIN 0 t FIGURE 4.7.3: APPLIED SIGNAL (4) [60] Copyright reserved Please turn over ### Page 13 Downloaded from hlayiso.com Electrical Technology: Electronics 13 DBE/November 2019 NSC QUESTION 5: AMPLIFIERS 5.1 Compare Class A and Class B amplifiers with reference to the following: 5.1.1 Q-point (2) 5.1.2 Efficiency (2) 5.2 Refer to FIGURE 5.2 below and answer the questions that follow. IC VCC = 12 V (mA) 15 RC = 800 Ω 12 Q- point S1 9 Q1 6 3 2 4 6 8 10 12 VCE 0V FIGURE 5.2 A : DC LOADLINE FIGURE 5.2B: BIASED TRANSISTOR FIGURE 5.2: TRANSISTOR AMPLIFIER 5.2.1 State ONE function of the collector resistor in FIGURE 5.2B. (1) 5.2.2 Explain how VCE becomes equivalent to VCC when S1 is open. (2) 5.3 With reference to biasing, explain Class C amplification. (2) 5.4 Refer to FIGURE 5.4 below and draw the output waveforms on the ANSWER SHEET for QUESTION 5.4 when the transistor is operating as the following: +VCC R 360° input NPN +V transistor output t -V FIGURE 5.4: BIASED NPN TRANSISTOR 5.4.1 Class A amplifier (3) 5.4.2 Class AB amplifier (3) Copyright reserved Please turn over ### Page 14 Downloaded from hlayiso.com Electrical Technology: Electronics 14 DBE/November 2019 NSC 5.5 State ONE undesirable condition that may occur due to the incorrect biasing of a transistor. (1) 5.6 Refer to FIGURE 5.6 below and answer the questions that follow. +VCC A D R1 RC G E C2 B T1 C1 +V 0 t CE R2 RE -V C F FIGURE 5.6: COMMON EMITTER AMPLIFIER 5.6.1 Explain why the circuit is called a common emitter amplifier. (2) 5.6.2 Name the points where the input signal and the load will be connected. (2) 5.6.3 Identify the TWO components that protect the transistor from thermal runaway. (2) 5.6.4 Draw the waveform that would appear between points G and F on the ANSWER SHEET for QUESTION 5.6.4. (3) 5.6.5 Draw the output waveform that would appear between points E and F on the ANSWER SHEET for QUESTION 5.6.5. (3) 5.7 Give TWO reasons for using coupling methods in amplifier circuits. (2) Copyright reserved Please turn over ### Page 15 Downloaded from hlayiso.com Electrical Technology: Electronics 15 DBE/November 2019 NSC 5.8 A push-pull amplifier circuit has the following information: Given: Input power = 3 015 watts Output power = 1 200 watts Input voltage = 230 V Output voltage = 219 V Output current = 5,48 A Output impedance = 40 Ω Calculate the following: 5.8.1 Power gain in dB (3) 5.8.2 Voltage gain in dB (3) 5.9 Define the term gain of an amplifier. (2) 5.10 A certain cascaded amplifier (three-stage amplifier) arrangement has the following voltage gain: AV1= 10, AV2= 15 and AV3= 20. Calculate the total voltage gain. (3) 5.11 Refer to the amplifier circuit diagram in FIGURE 5.11 below and answer the questions that follow. +Vcc R1 Q1 NPN R2 C R3 AC Q2 PNP R4 FIGURE 5.11: AMPLIFIER CIRCUIT DIAGRAM 5.11.1 Identify the circuit diagram in FIGURE 5.11. (2) 5.11.2 Explain how cross-over distortion is eliminated in this amplifier. (2) 5.11.3 State the purpose of the resistors in the circuit diagram. (1) 5.11.4 Draw a fully labelled output waveform of the circuit diagram on the ANSWER SHEET for QUESTION 5.11.4. (3) Copyright reserved Please turn over ### Page 16 Downloaded from hlayiso.com Electrical Technology: Electronics 16 DBE/November 2019 NSC 5.12 FIGURE 5.12 below shows an FET oscillator circuit diagram. Answer the questions that follow. +VCC R2 C5 VOUT C3 Q1 R1 C4 R3 L C6 C1 C2 FIGURE 5.12: COLPITTS OSCILLATOR USING FET TRANSISTOR Compare the differences between RC and LC oscillators with reference to the following: 5.12.1 Feedback circuit (2) 5.12.2 Oscillation frequency (2) 5.13 Draw a modified tank circuit to change the Colpitts oscillator in FIGURE 5.12 into a Hartley oscillator. (3) 5.14 Name TWO functions of transistor Q1 in FIGURE 5.12. (2) 5.15 Name TWO similarities between an LC oscillator and an RC oscillator. (2) [60] TOTAL: 200 Copyright reserved ### Page 17 Downloaded from hlayiso.com Electrical Technology: Electronics DBE/November 2019 NSC FORMULA SHEET RLC CIRCUITS SEMICONDUCTOR DEVICES P  V  I  cos θ V  RF  Gain A V  OUT     XL  2 fL VIN  R IN  1  R  XC  VOUT  VIN    F  2 fC  R IN  1 fr   R  2 LC VOUT  VIN  1  F  f  R IN  BW  r Q SWITCHING CIRCUITS Series  R R R  VOUT    V1 F  V2 F  ...VN F  VR  I R  R1 R2 RN  VL  I XL V VOUT Gain A V  OUT  VC  I XC VIN V1  V2  ...VN  VT VOUT   (V1  V2  ...VN ) IT  OR IT  IR  IC  IL Z AMPLIFIERS V Z  R 2  X L  X C  IC  C 2 RC VT  VR  VL  VC  VT  I Z VCC  VCE  ICRC 2 2 OR R VR VOUT Cos θ  OR Cos θ  AV  Z VT VIN XL X C VL VC 1 L I Q     A I  OUT Z Z VT VT R C IIN Parallel A = β1 x β 2 OR A V  A V1  A V2  A V3 VT  VR  VL  VC VT PIN  I2  ZIN IR  R POUT  I2  Z OUT VT IC  GAIN IN DECIBELS XC V I IL  T A I  20 log10 OUT XL IIN V IT  IR  IL  IC  A V  20 log10 OUT 2 2 VIN VT P Z A P  10 log10 OUT IT PIN I Cos θ  R IT XL X C IL IC 1 L Q     Z Z IT IT R C Copyright reserved Please turn over ### Page 18 Downloaded from hlayiso.com Electrical Technology: Electronics DBE/November 2019 NSC CENTRE NUMBER: EXAMINATION NUMBER: ANSWER SHEET QUESTION 2: RLC CIRCUITS 2.3.4 VL = 16 V VR = 12 V IT = 3 A Transfer mark to answer book VC = 24 V MOD FIGURE 2.3.4 (4) QUESTION 3: SEMICONDUCTOR DEVICES 3.4.3 VC Input 0 t Transfer mark to answer book Output t MOD FIGURE 3.4.3 (3) Copyright reserved Please turn over ### Page 19 Downloaded from hlayiso.com Electrical Technology: Electronics DBE/November 2019 NSC CENTRE NUMBER: EXAMINATION NUMBER: ANSWER SHEET QUESTION 4: SWITCHING CIRCUITS 4.1.2 +V Transfer mark to 0 answer book t +V MOD FIGURE 4.1.2 (2) 4.4.2 V VIN VREF 0 t +V 0 t Transfer mark to answer book -V MOD FIGURE 4.4.2 (4) Copyright reserved Please turn over ### Page 20 Downloaded from hlayiso.com Electrical Technology: Electronics DBE/November 2019 NSC CENTRE NUMBER: EXAMINATION NUMBER: ANSWER SHEET 4.6.2 +V Input 0 t +V Transfer mark to 0 answer book Output t -V MOD FIGURE 4.6.2 (3) 4.7.3 VIN 0 t label t Transfer mark to answer book VOUT label MOD FIGURE 4.7.3 (4) Copyright reserved Please turn over ### Page 21 Downloaded from hlayiso.com Electrical Technology: Electronics DBE/November 2019 NSC CENTRE NUMBER: EXAMINATION NUMBER: ANSWER SHEET QUESTION 5: AMPLIFIERS 5.4.1 +V 0 t Transfer mark to answer book -V MOD FIGURE 5.4.1 (3) 5.4.2 +V 0 t Transfer mark to answer book -V MOD FIGURE 5.4.2 (3) Copyright reserved Please turn over ### Page 22 Downloaded from hlayiso.com Electrical Technology: Electronics DBE/November 2019 NSC CENTRE NUMBER: EXAMINATION NUMBER: ANSWER SHEET 5.6.4 Input 0 t +V DC offset OR Q-point Transfer mark to answer book 0 t MOD FIGURE 5.6.4 (3) 5.6.5 Input 0 t +V 0 t Transfer mark to answer book -V MOD FIGURE 5.6.5 (3) Copyright reserved Please turn over ### Page 23 Downloaded from hlayiso.com Electrical Technology: Electronics DBE/November 2019 NSC CENTRE NUMBER: EXAMINATION NUMBER: ANSWER SHEET 5.11.4 Input 0 t +V 0 t Transfer mark to answer book -V MOD FIGURE 5.11.4 (3) Copyright reserved ## Related documents - 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