# Electrical Technology Grade 12 November 2024 NSC QP (Eng)

> Grade 12 Electrical Technology question paper from the November 2024 NSC (English), 24 pages. Read online or download the free PDF.

- Page: https://www.hlayiso.com/library/electrical-technology-nov-2024-digital-eng/b155e0ea-190a-4edb-b066-aa5d817f6943
- Updated: 2026-09-27
- Subject: Electrical Technology
- Grade: Grade 12
- Document type: Question paper
- Year: 2024
- Exam period: November 2024 NSC
- Curriculum: CAPS
- Pages: 24

Breadcrumbs: [Home](https://www.hlayiso.com/) › [Library](https://www.hlayiso.com/library) › [Grade 12](https://www.hlayiso.com/library/grade-12) › [Electrical Technology](https://www.hlayiso.com/library/grade-12/electrical-technology) › [Electrical Technology Grade 12 November 2024 NSC QP (Eng)](https://www.hlayiso.com/library/electrical-technology-nov-2024-digital-eng/b155e0ea-190a-4edb-b066-aa5d817f6943)

## About this document

Electrical Technology · Grade 12 · November 2024 NSC · 2024. Question paper, 24 pages. Read online or download the PDF.

Read it free online on the page above; download the PDF from there.

## Document text

Text extracted from the PDF. Layout, diagrams and tables may not survive extraction.

### Page 1

Confidential

                                   GRAAD 12

                                NATIONAL
                           SENIOR CERTIFICATE

                                   GRADE 12

             ELECTRICAL TECHNOLOGY: DIGITAL ELECTRONICS

                                 NOVEMBER 2024

MARKS: 200

TIME: 3 hours

        This question paper consists of 16 pages, a 1-page formula sheet and
                              a 7-page answer sheet.

Copyright reserved                                                   Please turn over

### Page 2

Electrical Technology: Digital Electronics         2                        DBE/November 2024
                                             NSC Confidential

INSTRUCTIONS AND INFORMATION

1.         This question paper consists of SIX questions.

2.         Answer ALL the questions.

3.         Answer the following questions on the attached ANSWER SHEETS:

           QUESTIONS 3.4.4, 3.5.1 and 3.9.2
           QUESTIONS 5.2.1, 5.2.2, 5.3, 5.4.1, 5.4.2 and 5.5
           QUESTION 6.9

4.         Write your centre number and examination number on every ANSWER
           SHEET and hand them in with your ANSWER BOOK, whether you have used
           them or not.

5.         Sketches and diagrams must be large, neat and FULLY LABELLED.

6.         Show ALL calculations and round off answers correctly to TWO decimal
           places.

7.         Number the answers correctly according to the numbering system used in this
           question paper.

8.         You may use a non-programmable calculator.

9.         Calculations must include the following:

           9.1       Formulae and manipulations where needed

           9.2       Correct replacement of values

           9.3       Correct answer and relevant units where applicable

10.        A formula sheet is attached at the end of this question paper.

11.        Write neatly and legibly.

Copyright reserved                                                              Please turn over

### Page 3

Electrical Technology: Digital Electronics               3                 DBE/November 2024
                                                   NSC Confidential

QUESTION 1: MULTIPLE-CHOICE QUESTIONS

Various options are provided as possible answers to the following questions. Choose
the answer and write only the letter (A–D) next to the question numbers (1.1 to 1.15) in
the ANSWER BOOK, e.g. 1.16 D.                Nov

1.1        A disastrous event, resulting from the use of plant and machinery, or from
           activities at a workplace, is known as a/an …

           A     minor incident.
           B     major incident.
           C     accident.
           D     risk.                                                                              (1)

1.2        The … multivibrator circuit produces a continuous square wave output without
           any external trigger.

           A     monostable
           B     astable
           C     bistable
           D     Schmitt trigger                                                                    (1)

1.3        The output of a 555 monostable multivibrator circuit … after a trigger pulse is
           applied.

           A     remains stable until the power is turned off
           B     switches to the other stable state and remains there indefinitely
           C     remains in the unstable state for a fixed period before returning to its
                 stable state
           D     continually changes between +VCC and -VCC                                          (1)

1.4        The primary function of a summing operational amplifier circuit is to …

           A     amplify only the largest signal of multiple input signals.
           B     subtract multiple input signals to receive one output signal.
           C     add multiple input signals to receive one output signal.
           D     compare multiple input signals to receive one output signal.                       (1)

1.5        The output voltage of an integrator operational amplifier … when a constant
           long and large input voltage is applied.

           A     is constant
           B     increases linearly
           C     decreases linearly
           D     oscillates between positive and negative values                                    (1)

Copyright reserved                                                               Please turn over

### Page 4

Electrical Technology: Digital Electronics         4                      DBE/November 2024
                                             NSC Confidential

1.6        A … is a characteristic of an ideal operational amplifier.

           A     low input impedance
           B     low voltage gain
           C     limited bandwidth
           D     low output impedance                                                            (1)

1.7        The gain of the … operational amplifier will be 2 if the values of the feedback
           resistor and the input resistor(s) are the same.

           A       integrator
           B       non-inverting
           C       inverting
           D       summing                                                                       (1)

1.8        A combinational logic circuit that combines an AND gate with an exclusive
           OR gate is known as a … adder.

           A       parallel
           B       full
           C       half
           D       serial                                                                        (1)

1.9        A … output has the transistor emitter connected to the anode of the LED.

           A       sourcing
           B       draining
           C       distributing
           D       sinking                                                                       (1)

1.10       A clocked RS flip-flop is in a set condition when …

           A       S = 1, R = 1.
           B       S = 1, R = 0.
           C       S = 0, R = 1.
           D       S = 0, R = 0.                                                                 (1)

1.11       A counter that is modified to stop its count before reaching its maximum count
           is known as a/an … counter.

           A       down
           B       up/down
           C       truncated
           D       None of the above-mentioned                                                   (1)

Copyright reserved                                                            Please turn over

### Page 5

Electrical Technology: Digital Electronics         5                       DBE/November 2024
                                             NSC Confidential

1.12       A communication peripheral that converts data from the host processor into a
           serial data stream is known as a/an …

           A       SPI.
           B       UART.
           C       SCI.
           D       I2C.                                                                            (1)

1.13       The term SPI stands for …

           A       serial peripheral interface.
           B       standard peripheral interface.
           C       sequential peripheral interface.
           D       successive peripheral interface.                                                (1)

1.14       A form of communication where the flow of data and information travels in one
           direction only is known as … communication.

           A       simplex
           B       fundamental
           C       duplex
           D       rudimentary                                                                     (1)

1.15       The start-up instructions of a microcontroller are stored in the …

           A       CPU.
           B       RAM.
           C       ROM.
           D       I/O unit.                                                                       (1)
                                                                                                   [15]

QUESTION 2: OCCUPATIONAL HEALTH AND SAFETY

2.1        Define the term workplace with reference to the Occupational Health and
           Safety Act, 1993 (Act 85 of 1993).                                                      (2)

2.2        Name TWO human rights in the workplace.                                                 (2)

2.3        Explain why poor ventilation is an unsafe condition in a workshop.                      (2)

2.4        State TWO types of victimisation by an employer that are forbidden.                     (2)

2.5        Explain why a person should not interfere with equipment in the workshop
           that is provided for safety.                                                            (2)
                                                                                                   [10]

Copyright reserved                                                              Please turn over

### Page 6

Electrical Technology: Digital Electronics         6                              DBE/November 2024
                                             NSC Confidential

QUESTION 3: SWITCHING CIRCUITS

3.1        Explain the concept negative feedback with reference to operational
           amplifiers.                                                                                    (2)

3.2        Name the switching circuit described by EACH of the following statements:

           3.2.1        In digital circuits and radio receivers, it is used to recover signals
                        that have been polluted by noise.                                                 (1)

           3.2.2        The output 'remembers' the last input and therefore this circuit is
                        often used as a memory element.                                                   (1)

           3.2.3        A circuit using a 741 IC receives an input pulse, the output swings
                        to -VCC momentarily and then swings back to its original
                        +VCC output state.                                                                (1)

3.3        FIGURE 3.3 below shows the circuit diagram of a 555 IC used as a bistable
           multivibrator. Answer the questions that follow.

                                                                         +9V

                                                                                R3
                    R2             R1                                          200 Ω
                   10 kΩ          10 kΩ
                                                                                  LED1
                                                             8
                                                     4
                                                     7   555         3
                                                     6
                                                     2                            LED2
                                                         1       5
                       S2            S1
                                                                      C2        R4
                                                                     10 nF     200 Ω

                               FIGURE 3.3: 555 BISTABLE MULTIVIBRATOR

           3.3.1        State the purpose of resistor R2.                                                 (1)

           3.3.2        Explain the operation of the circuit when S2 is pressed. Refer to the
                        inputs and the states of LED1 and LED2 in your response.                          (4)

           3.3.3        Explain how the circuit is reset.                                                 (2)

Copyright reserved                                                                     Please turn over

### Page 7

Electrical Technology: Digital Electronics           7                                             DBE/November 2024
                                               NSC Confidential

3.4        FIGURE 3.4 below shows a monostable multivibrator circuit using a
           741 op amp. Answer the questions that follow.

                                         C1
                                        1 µF                               +9 V
                                                             2             7
                              Input                                                6
                                                                                       Output

                                                           B 3
                                                                           4                 C2
                                                                           -9 V             1 µF
                                                  R1

                                                                                            R2
                                                 -VREF

                          FIGURE 3.4: MONOSTABLE MULTIVIBRATOR
           3.4.1        State the voltage at B during the circuit's resting condition.                                    (1)
           3.4.2        Explain the purpose of having a negative reference voltage (-VREF)
                        in the circuit during its natural resting condition.                                              (2)
           3.4.3        Explain the operation of the circuit when a positive trigger input,
                        greater than VREF, is applied to the inverting input.                                             (3)
           3.4.4        Draw the output for the circuit on the ANSWER SHEET for
                        QUESTION 3.4.4 if R2 and C2 are chosen to create a changed
                        (unstable) state for 3 seconds.                                                                   (4)
3.5        An astable multivibrator circuit can be constructed by using a 555 IC or a
           741 op amp. Answer the questions that follow.
          3.5.1         Complete the circuit diagram in FIGURE 3.5.1 on the ANSWER
                        SHEET for QUESTION 3.5.1 to make an astable multivibrator.

                                                                 +supply
                                                       2               7
                                                                               6         Output
                                                                 741
                                                       3
                                                                       4

                                                                 - supply

                                                                                       R2

                                FIGURE 3.5.1: INCOMPLETE CIRCUIT DIAGRAM OF
                                       AN ASTABLE MULTIVIBRATOR                                                           (4)
           3.5.2        Differentiate between the output voltages of an astable
                        multivibrator circuit using a 741 op amp and an astable
                        multivibrator circuit using a 555 IC.                                                             (2)

Copyright reserved                                                                                     Please turn over

### Page 8

Electrical Technology: Digital Electronics         8                          DBE/November 2024
                                             NSC Confidential

3.6        FIGURE 3.6 below shows a 741 op amp comparator circuit. Answer the
           questions that follow.

                                                       9V

                     R1
                   100 k                                              R3
                                                                     10 k
                                                        741                          Q1
                                     R2
            Thermistor                                                                  R5
                                   100 k
              (PTC)                                                     R4             330
                                                                      4,7 k
                                                                                        LED

                   FIGURE 3.6: COMPARATOR AS A TEMPERATURE SENSOR

           3.6.1        Name the component that sets the reference voltage in the circuit.           (1)

           3.6.2        Name TWO components that make up the sensing unit.                           (2)

           3.6.3        Explain how the temperature setting can be changed in the
                        comparator.                                                                  (2)

3.7        State TWO applications of a Schmitt trigger.                                              (2)

3.8        FIGURE 3.8 below shows the circuit diagram of an inverting summing
           amplifier. Answer the questions that follow.

                                                                R4 = 100 kΩ
                                     R1 = 10 kΩ
            V1 = 500 mV
                                                                     +9 V
                                     R2 = 10 kΩ
            V2 = 450 mV
                                     R3 = 10 kΩ
            V3 = 300 mV                                                                VOUT
                                                                      -9 V

                                   FIGURE 3.8: SUMMING AMPLIFIER

Copyright reserved                                                                Please turn over

### Page 9

Electrical Technology: Digital Electronics         9                           DBE/November 2024
                                             NSC Confidential

          Given:

          R1 = R2 = R3 = 10 kΩ
          R4       = 100 kΩ (variable)
          V1       = 500 mV
          V2       = 450 mV
          V3       = 300 mV

           3.8.1        Explain the purpose of the variable resistor R4 in the circuit.               (2)

           3.8.2        Calculate the output voltage if R4 is set to 72 kΩ.                           (3)

           3.8.3        State why the output voltage can be calculated by the formula
                        𝑉𝑂𝑈𝑇 = −(𝑉1 + 𝑉2 + 𝑉3 ) when R4 is set to 10 kΩ.                              (1)

           3.8.4        Explain the effect on the circuit and its output if the value of R 4 is
                        increased beyond 72 kΩ.                                                       (2)

3.9       FIGURE 3.9 below shows the input and output waveforms for a short time
          constant in a passive RC differentiator circuit. Answer the questions that follow.

                                               VIN

                                                0

                                             VOUT
                                                0

                     FIGURE 3.9: PASSIVE RC DIFFERENTIATOR WAVEFORMS

           3.9.1        Explain the primary function of a passive differentiator circuit.             (2)

           3.9.2        Draw, on the ANSWER SHEET for QUESTION 3.9.2, the output
                        waveform for a long time constant of the circuit for ONE full cycle.          (3)

3.10       Differentiate between an op amp differentiator and an op amp integrator with
           reference to circuit configuration.                                                        (2)
                                                                                                      [50]

Copyright reserved                                                                 Please turn over

### Page 10

Electrical Technology: Digital Electronics                10                               DBE/November 2024
                                                    NSC Confidential

QUESTION 4: SEMICONDUCTOR DEVICES

4.1        Refer to FIGURE 4.1 below and answer the questions that follow.

                                                       +V                                           +V

               V2           +                                       V1          _
            (positive)                                           (positive)
                            _                                                   +
                                             VOUT                                            VOUT
                                 -V                                                 -V
                                                       0V                                           0V
                           FIGURE A                                             FIGURE B

                                  FIGURE 4.1: OPERATIONAL AMPLIFIERS

           4.1.1         Determine the state of the output voltages in FIGURE A and
                         FIGURE B.                                                                                (2)

           4.1.2         State TWO advantages of an operational amplifier.                                        (2)

           4.1.3         Explain the term common mode rejection ratio with reference to
                         operational amplifier characteristics.                                                   (1)

4.2        FIGURE 4.2 below is an operational amplifier with an input signal voltage of
           2 mV, a feedback resistor RF = 4,7 kΩ, non-inverting resistor R1 = 22 kΩ and
           input resistor RIN = 470 Ω. Answer the questions that follow.

                                                                RF = 4,7 k Ω

                                      RIN = 470 Ω                      +9 V
                                                                   _

                                                                  +
                    VIN = 2 mV                                         -- 9 V
                                                                                           VOUT
                                       R1 = 22 kΩ

                                                                                             0V

                                 FIGURE 4.2: OPERATIONAL AMPLIFIER

           Given:
           VIN     = 2 mV
           RIN     = 470 Ω
           RF      = 4,7 kΩ
           R1      = 22 kΩ

Copyright reserved                                                                             Please turn over

### Page 11

Electrical Technology: Digital Electronics          11                           DBE/November 2024
                                              NSC Confidential

           4.2.1        Name the type of feedback used in FIGURE 4.2.                                   (1)

           4.2.2        Calculate the gain.                                                             (3)

           4.2.3        Calculate the output voltage.                                                   (3)

           4.2.4        Explain why operational amplifiers require dual power supplies to
                        operate.                                                                        (2)

4.3        FIGURE 4.3 below shows the internal circuit diagram of a 555 IC. Answer the
           questions that follow.

                       +Vcc                                                         Control
                      supply                 Discharge           Threshold          Voltage

                         8                      7                    6                 5

                 5 kΩ
                                                        -
                                                            C1
                                                        +                                    T2
                                                                 R   Flip-   Q

                5 kΩ                                             S   flop    Q

                                                        -
                                                            C2
                                                        +
                5 kΩ

                                        T1

                        1                       2                    3                 4
                      Ground                  Trigger             Output             Reset

                             FIGURE 4.3: INTERNAL LAYOUT OF A 555 IC

           4.3.1        State ONE industrial application where the 555 IC is used as a
                        timing device.                                                                  (1)

           4.3.2        Explain how the NPN transistor (T 1) can be turned ON when the
                        555 IC is connected in a circuit.                                               (1)

           4.3.3        State the condition of the comparator's output voltage when the
                        inverting terminal voltage is higher than the non-inverting terminal.           (1)

           4.3.4        State the function of the three 5 kΩ resistors.                                 (1)

           4.3.5        Briefly describe what happens when the voltage at Pin 2 falls below
                        ⅓ of the supply voltage.                                                        (2)
                                                                                                        [20]

Copyright reserved                                                                   Please turn over

### Page 12

Electrical Technology: Digital Electronics         12                           DBE/November 2024
                                             NSC Confidential

QUESTION 5: DIGITAL AND SEQUENTIAL DEVICES
5.1        Refer to FIGURE 5.1 below of the liquid crystal display (LCD) and answer the
           questions that follow.

                                                                X
                                                                                          B
                             A

         Radiating light
                                                                    Grids

                                                                                                       D
                                      C
                                                                       Y
                Polarising light

                                                 FIGURE 5.1

           5.1.1        Explain why light waves will pass from point A to point B, but NOT
                        from point C to point D.                                                       (4)

           5.1.2        Describe how pixels are used to create a picture in an LCD screen.             (3)

5.2        FIGURE 5.2 below represents the block diagram of a binary-to-decimal
           decoder.

                                                                            0
                                                                            1
                                  A                                         2
                                  B                                         3
                                                       Binary-to-           4
                                  C                     decimal             5
                                  D                    decoder              6
                                                                            7
                                                                            8
                                                                            9

                        FIGURE 5.2: BINARY-TO-DECIMAL DECODER

Copyright reserved                                                                  Please turn over

### Page 13

Electrical Technology: Digital Electronics         13                    DBE/November 2024
                                             NSC Confidential

           5.2.1        On the ANSWER SHEET for QUESTION 5.2.1, complete the logic
                        circuit of the binary-to-decimal decoder using AND gates and NOT
                        gates.                                                                  (6)

           5.2.2        Complete the truth table of FIGURE 5.2 on the ANSWER SHEET
                        for QUESTION 5.2.2 by indicating only the HIGH output states of
                        W, X, Y and Z.                                                          (4)

5.3        Refer to FIGURE 5.3 below, which is a block diagram of a full adder, and
           complete the logic circuit of a full adder using AND gates, exclusive OR gates
           and an OR gate on the ANSWER SHEET for QUESTION 5.3

                                 Ci                                  Ʃ
                                  A                  FA
                                  B                                 Co

                          FIGURE 5.3: BLOCK DIAGRAM OF A FULL ADDER                             (5)

5.4        Refer to FIGURE 5.4 below of a clocked D-type flip-flop and answer the
           questions that follow.

                                                 D              Q

                                                 CLK

                                                                Q

                                      FIGURE 5.4: D-TYPE FLIP-FLOP

           5.4.1        Complete the logic circuit of this flip-flop on the ANSWER SHEET
                        for QUESTION 5.4.1.                                                     (6)

           5.4.2        Complete the truth table of this flip-flop on the ANSWER SHEET
                        for QUESTION 5.4.2.                                                     (4)

Copyright reserved                                                           Please turn over

### Page 14

Electrical Technology: Digital Electronics                    14                                                       DBE/November 2024
                                                        NSC Confidential

5.5           Refer to FIGURE 5.5 of a binary counter below and complete the timing
              diagrams of this counter on the ANSWER SHEET for QUESTION 5.5

                                                    1                                           A                                    B

                                                                      FF0                                         FF1
                                                                       SET                                        SET
                                                              J                  Q                            J          Q

                                                              K CLR Q                                         K CLR Q

                 Input clock
                   pulses

                                                              FIGURE 5.5                                                                      (6)
5.6           Explain the difference between pulse-triggered and edge-triggered flip flops.                                                   (4)
5.7           Briefly describe the following counters:
              5.7.1        Frequency divider                                                                                                  (2)
              5.7.2        Decade counter                                                                                                     (2)

5.8           Refer to FIGURE 5.8 below and answer the questions that follow.

                                                                      SET                           SET                            SET
       High                          SET
                                                        mux                  Q            mux   D         Q              mux             Q     B
                           mux
                                 D         Q                  D                                                                D
                                                                      FFB                           FFC                            FFD
                                     FFA
                                                                      CLR                           CLR                            CLR
                                     CLR

      Clock

                      PA                       PB                                    PC                           PD

                                                                  A

                                                               FIGURE 5.8

              5.8.1        Identify the register in FIGURE 5.8.                                                                               (1)
              5.8.2        Label A and B.                                                                                                     (2)
              5.8.3        Explain the operation of this register.                                                                            (3)
              5.8.4        How many clock pulses are needed to unload the data from the
                           register?                                                                                                          (1)
              5.8.5        State TWO uses of this register.                                                                                   (2)
                                                                                                                                              [55]

Copyright reserved                                                                                                         Please turn over

### Page 15

Electrical Technology: Digital Electronics         15                   DBE/November 2024
                                             NSC Confidential

QUESTION 6: MICROCONTROLLERS

6.1        Define the term microcontroller.                                                    (3)

6.2        Refer to the block diagram in FIGURE 6.2 below and answer the questions
           that follow.

                                     A

                                                    ALU                    Output
                Control                          Arithmetic
                                                                B
                                                    logic
                 unit                                unit
                                                                            Input

                         FIGURE 6.2: MICROCONTROLLER'S STRUCTURE

           6.2.1        Label A and B.                                                         (2)

           6.2.2        Explain the function of the control unit.                              (4)

           6.2.3        State the function of the ALU.                                         (2)

6.3        Refer to the hardware of a microcontroller and explain the difference between
           discrete logic and integrated logic.                                                (2)

6.4        Describe the accumulator as a general-purpose register.                             (2)

6.5        Refer to communication in a microcontroller and answer the questions that
           follow.

           6.5.1        Explain the function of the system bus.                                (4)

           6.5.2        State TWO advantages of synchronous communication when it is
                        compared to asynchronous communication.                                (2)

           6.5.3        State TWO disadvantages of parallel communication when it is
                        compared to serial communication.                                      (2)

6.6       Refer to communication protocols in a microcontroller and explain the
          difference between half-duplex communication and full-duplex communication.          (4)

Copyright reserved                                                          Please turn over

### Page 16

Electrical Technology: Digital Electronics            16                     DBE/November 2024
                                                NSC Confidential

6.7         FIGURE 6.7 below is the block diagram of the I2C bus system. Answer the
            questions that follow.

                                                                                             +5 V

                                                                             RP       RP

                     Master

      SCL

      SDA

                                      Slave 1           Slave 2    Slave 3

                                                   FIGURE 6.7
            6.7.1       Write out the abbreviation SDA in full.                                  (1)
            6.7.2       Explain the function of the pull-up resistors.                           (2)
            6.7.3       State TWO disadvantages of the I2C bus.                                  (2)
            6.7.4       Explain the master-slave operation of the I2C bus.                       (6)
6.8         Refer to microcontrollers and define the following terms:
            6.8.1       Program                                                                  (2)
            6.8.2       Flow diagram                                                             (2)
6.9         FIGURE 6.9 on the ANSWER SHEET shows an incomplete flow chart of a
            PICAXE factory security system.
            Design a flow diagram of a factory security system that has TWO sensors on
            different parts of the premises.
               This system consists of TWO sensors.
               The first sensor is set up at the main entrance of the factory.
               The second sensor is set up on the beam that protects the rear entrance
                of the factory.
               If any of the sensors is activated, the alarm will be activated.
               The alarm must include a reset function.
               No timing function is required.
            Complete and label the flow chart of this device on the ANSWER SHEET for
            QUESTION 6.9.                                                                        (8)
                                                                                                 [50]
                                                                                   TOTAL:        200

Copyright reserved

### Page 17

Electrical Technology: Digital Electronics                        DBE/November 2024
                                               NSC Confidential

                                            FORMULA SHEET
SEMICONDUCTOR DEVICES

              VOUT      RF                           RF
Gain A V                     OR       AV  1
               VIN       R IN                        RIN
              R 
VOUT  VIN    F 
               R IN 
                 R 
VOUT  VIN  1  F 
                 R IN 
SWITCHING CIRCUITS

          R         R         R 
VOUT    V1 F  V2 F  ...VN F 
           R1       R2        RN 
              VOUT            VOUT
Gain A V           
               VIN     V1  V2  ...VN 
 UIT   ( V1  V2  ... VN )
VOUT

                 R2
VFB = VSAT ×
                R1 +R2

                    R2
VTRIG = VOUT ×
                   R1 +R2

FLOW CHART SYMBOLS

                             Process

                             Decision

                            Terminator

                              Data

Copyright reserved

### Page 18

Electrical Technology: Digital Electronics                                          DBE/November 2024
                                                  NSC Confidential

 CENTRE NUMBER:

 EXAMINATION NUMBER:

ANSWER SHEET

QUESTION 3: SWITCHING CIRCUITS

3.4.4
                              Trigger pulse

                0            1       2       3         4         5   6   t (s)

             +9 V

            VOUT
                                                                         t (s)

             -9V

                                                                                     Transfer mark to
                                                                                     answer book

                                                                                                 MOD

                                                     FIGURE 3.4.4                                           (4)

3.5.1

                                                      +supply
                                              2            7
                                                                 6         Output
                                                     741
                                              3
                                                           4

                                                      - supply
                                                                                    Transfer mark to
                                                                                    answer book
                                                                         R2

                                                                                                MOD

                                                     FIGURE 3.5.1                                           (4)

Copyright reserved                                                                       Please turn over

### Page 19

Electrical Technology: Digital Electronics                      DBE/November 2024
                                             NSC Confidential

 CENTRE NUMBER:

 EXAMINATION NUMBER:

ANSWER SHEET

3.9.2

              VIN

                 0

             VOUT

                 0

                                                                Transfer mark to
                                                                answer book

                                                                            MOD

                                                FIGURE 3.9.2                           (3)

Copyright reserved                                                  Please turn over

### Page 20

Electrical Technology: Digital Electronics                      DBE/November 2024
                                             NSC Confidential

 CENTRE NUMBER:

 EXAMINATION NUMBER:

ANSWER SHEET

QUESTION 5: DIGITAL AND SEQUENTIAL DEVICES

5.2.1
            A

            B

                                                                      Output W

                                                                       Output X

                                                                       Output Y

                                                                       Output Z

                                                                Transfer mark to
                                                                answer book

                                                                            MOD

                                                FIGURE 5.2.1                           (6)

Copyright reserved                                                  Please turn over

### Page 21

Electrical Technology: Digital Electronics                                   DBE/November 2024
                                             NSC Confidential

 CENTRE NUMBER:

 EXAMINATION NUMBER:

ANSWER SHEET

5.2.2
                     Inputs                                Outputs
                 A             B             W         X             Y   Z
                 1             0
                 1             1
                 0             0
                 0             1

                                                                              Transfer mark to
                                                                              answer book

                                                                                          MOD

                                                 FIGURE 5.2.2                                        (4)

5.3
            Ci
                                                                                                Ʃ

            A
            B                                                                               Co

                                                                             Transfer mark to
                                                                             answer book

                                                                                         MOD

                                                 FIGURE 5.3                                          (5)

Copyright reserved                                                                Please turn over

### Page 22

Electrical Technology: Digital Electronics                              DBE/November 2024
                                             NSC Confidential

 CENTRE NUMBER:

 EXAMINATION NUMBER:

ANSWER SHEET

5.4.1

            D
                                                                                           Q

                         CLK

                                                                                           Q

                                                                        Transfer mark to
                                                                        answer book

                                                                                    MOD

                                                FIGURE 5.4.1                                    (6)

5.4.2
                   CLK                   D                Q      Q
                     0                   0             Latch    Latch
                     0                   1             Latch    Latch
                     1                   0
                     1                   1

                                                                        Transfer mark to
                                                                        answer book

                                                                                    MOD

                                                FIGURE 5.4.2                                    (4)

Copyright reserved                                                           Please turn over

### Page 23

Electrical Technology: Digital Electronics                              DBE/November 2024
                                                 NSC Confidential

 CENTRE NUMBER:

 EXAMINATION NUMBER:

ANSWER SHEET

5.5

                 Input                       1          2           3
              clock pulses

                     Output A

                     Output B

                                                                        Transfer mark to
                                                                        answer book

                                                                                    MOD

                                                     FIGURE 5.5                                (6)

Copyright reserved                                                          Please turn over

### Page 24

Electrical Technology: Digital Electronics                      DBE/November 2024
                                             NSC Confidential

 CENTRE NUMBER:

 EXAMINATION NUMBER:

ANSWER SHEET

QUESTION 6: MICROCONTROLLERS

6.9
                                  Start

                                                                   Transfer mark to
                                                                   answer book

                                                                               MOD

                                             FIGURE 6.9                               (8)

Copyright reserved

## Related documents

- [Electrical Technology Nov 2024 (Power Systems) Afr](https://www.hlayiso.com/library/electrical-technology-nov-2024-power-systems-afr/5f2b4850-fffb-4024-8f24-d74bd8677a25) — Electrical Technology · QP · 2024 · Afr
- [Electrical Technology May-June 2024 (Power Systems) Eng](https://www.hlayiso.com/library/grade-12-electrical-technology-2024-nsc-june-exam-question-paper-english/0d8d71f4-5725-40ea-9e29-a19e1c8a7867) — Electrical Technology · QP · 2024 · Eng
- [Electrical Technology May-June 2024 (Digital) Eng](https://www.hlayiso.com/library/grade-12-electrical-technology-2024-nsc-june-exam-question-paper-english/2b227e9b-0513-468e-8b1a-d4df808071cd) — Electrical Technology · QP · 2024 · Eng
- [ELEC TECH GR12 MEMO SEPT2024 Power Systems Afrikaans](https://www.hlayiso.com/library/elec-tech-gr12-memo-sept2024-power-systems-afrikaans/1a395c97-b838-42e6-9bd6-30a85a714b11) — Electrical Technology · Memo · 2024 · Afr
- [ELEC TECH GR12 MEMO SEPT2024 Power Systems English](https://www.hlayiso.com/library/elec-tech-gr12-memo-sept2024-power-systems-english/bea78337-b137-406a-9b4a-c6e631a84c9d) — Electrical Technology · Memo · 2024 · Eng
- [ELEC TECH GR12 MEMO SEPT2024 Electronics English](https://www.hlayiso.com/library/elec-tech-gr12-memo-sept2024-electronics-english/c80784c8-a9c8-49f8-b740-a29558fe2de9) — Electrical Technology · Memo · 2024 · Eng

## More from Grade 12 Electrical Technology

- [Gr 12 Dig Elec ATP 2023-24](https://www.hlayiso.com/library/gr-12-dig-elec-atp-2023-24/8d3b2ee7-1d14-498d-a86b-d9fc34674531) — ATP
- [ELECTRIC TECH (Digital) MEMO GR12 SEPT 2025 ENG watermark](https://www.hlayiso.com/library/electric-tech-digital-memo-gr12-sept-2025-eng-watermark/0a867070-2654-43cf-8e48-5037555e0c3d) — Memo · 2025 · Eng
- [Electrical Technology P1 (Electronics) (English) June 2025 Possible Answers](https://www.hlayiso.com/library/electrical-technology-p1-electronics-english-june-2025-possible-answers/4302563e-89b7-4f54-8a21-63b2020e985f) — Memo · 2025 · Eng
- [Electrical Technology Nov 2025 (Digital) MG Afr](https://www.hlayiso.com/library/grade-12-electrical-technology-2025-nsc-november-exam-memorandum/3b862a0c-6a87-4296-b5b6-09b072c7d1e9) — Memo · 2025 · Afr
- [ELEC TECH GR12 MEMO SEPT2024 Digital English](https://www.hlayiso.com/library/elec-tech-gr12-memo-sept2024-digital-english/cb603860-b00d-40c2-a36b-aa5e97b7d1e5) — Memo · 2024 · Eng
- [ELEC TECH MEMO SEPT2023 Digital English](https://www.hlayiso.com/library/elec-tech-memo-sept2023-digital-english/1d2b04e7-c486-4f4e-9494-b0ccbcaf2ebb) — Memo · 2023 · Eng

## Collection

- [Grade 12 past papers](https://www.hlayiso.com/grade-12/past-papers)

---

Hlayiso: free CAPS and IEB past papers, memos, notes and study guides for South African learners. When citing, link the page URL above, not a PDF or /api/ URL.
