# Electrical Technology Grade 12 November 2024 NSC Memo (Eng)

> Grade 12 Electrical Technology memorandum from the November 2024 NSC (English), 15 pages. Read online or download the free PDF.

- Page: https://www.hlayiso.com/library/electrical-technology-nov-2024-digital-mg-eng/200c3b27-716d-47b4-a29d-81caca0c5203
- Updated: 2026-10-29
- Subject: Electrical Technology
- Grade: Grade 12
- Document type: Memorandum
- Year: 2024
- Exam period: November 2024 NSC
- Curriculum: CAPS
- Pages: 15

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Electrical Technology · Grade 12 · November 2024 NSC · 2024. Memorandum. Read online or download the PDF.

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## Document text

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### Page 1

NATIONAL
                             SENIOR CERTIFICATE

                                     GRADE 12

             ELECTRICAL TECHNOLOGY: DIGITAL ELECTRONICS

                                  NOVEMBER 2024

                              MARKING GUIDELINES

MARKS: 200

                     These marking guidelines consist of 15 pages.

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### Page 2

Electrical Technology: Digital Electronics              2                  DBE/November 2024
                                             NSC – Marking Guidelines

INSTRUCTIONS TO THE MARKERS

1.         All questions with multiple answers imply that any relevant, acceptable
           answer should be considered.

2.         Calculations:

           2.1        All calculations must show the formulae.

           2.2        Substitution of values must be done correctly.

           2.3        All answers MUST contain the correct unit to be considered.

           2.4        Alternative methods must be considered, provided that the correct
                      answer is obtained.

           2.5        Where an incorrect answer could be carried over to the next step,
                      the first answer will be deemed incorrect. However, should the
                      incorrect answer be carried over correctly, the marker has to re-
                      calculate the values, using the incorrect answer from the first
                      calculation. If correctly used, the candidate should receive the full
                      marks for subsequent calculations.

3.         This memorandum is only a guide with model answers. Alternative
           interpretations must be considered and marked on merit. However, this
           principle should be applied consistently throughout the marking session at
           ALL marking centres.

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Electrical Technology: Digital Electronics              3               DBE/November 2024
                                             NSC – Marking Guidelines

QUESTION 1: MULTIPLE CHOICE

1.1        B✓                                                                                 (1)

1.2        B✓                                                                                 (1)

1.3        C✓                                                                                 (1)

1.4        C✓                                                                                 (1)

1.5        B/C ✓                                                                              (1)

1.6        D✓                                                                                 (1)

1.7        B✓                                                                                 (1)

1.8        C✓                                                                                 (1)

1.9        A✓                                                                                 (1)

1.10       B✓                                                                                 (1)

1.11       C✓                                                                                 (1)

1.12       B✓                                                                                 (1)

1.13       A✓                                                                                 (1)

1.14       A✓                                                                                 (1)

1.15       C✓                                                                                 (1)
                                                                                              [15]

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Electrical Technology: Digital Electronics              4                   DBE/November 2024
                                             NSC – Marking Guidelines

QUESTION 2: OCCUPATIONAL HEALTH AND SAFETY

2.1        Workplace means any premises or place where a person performs work ✓ in
           the course of employment.✓                                                              (2)

2.2        Your right to fair labour practices. ✓
           Your right to work reasonable hours. ✓
           Your right to belong to a trade union.
           Your right to earn a living wage.
           Your right not to be discriminated against.
           Your right to work in a safe environment.                                               (2)

2.3        Poor ventilation reduces the correct amount of oxygen ✓ which might lead
           to drowsiness. ✓
           NOTE: If reference is made to other effects that relates to poor ventilation like
           drowsiness, accidents etc. the answer will be accepted on merit.                        (2)

2.4        • To dismiss an employee without due process. 
           • To reduce the rate of remuneration without due process. 
           • Alter the terms of conditions of his/her employment to terms of conditions
             that is less favourable to him/herself.
           • Harassment and verbal abuse.
           • Alter position relative to other people.
           • Treat employees unfair because of race.

           NOTE: If a learner only mentions an infringement of rights only 1 mark will be
           awarded. Duplicate mentioning of rights will not be awarded                             (2)

2.5        Equipment may be damaged making it unsafe  endangering the life of other
           users  which might lead to an accident/injury.                                         (2)
                                                                                                   [10]

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Electrical Technology: Digital Electronics              5                               DBE/November 2024
                                             NSC – Marking Guidelines

QUESTION 3: SWITCHING CIRCUITS

3.1        Negative feedback is when a portion of the output signal ✓ is fed back to the
           input, out of phase ✓ or subtracted from the input.                                                 (2)

3.2        3.2.1        Schmitt trigger ✓                                                                      (1)

           3.2.2        Bistable multivibrator ✓                                                               (1)

           3.2.3        Monostable multivibrator ✓                                                             (1)

3.3        3.3.1        R2 is a pull-up resistor ✓
                        R2 keeps the voltage on pin 2 high.                                                    (1)

           3.3.2        •    When S2 is pressed it connects pin 2 to 0 V. ✓
                        •    This low input triggers the circuit and the output goes high. ✓
                        •    When output goes high LED2 is forward biased and ON ✓
                        •    while LED1 is reversed biased and OFF. ✓                                          (4)

           3.3.3        The circuit is reset by pressing S1. ✓ This connects reset pin 4
                        to 0 V. ✓                                                                              (2)

3.4        3.4.1        0V✓                                                                                    (1)

           3.4.2        During its natural resting condition, the negative reference voltage
                        keeps the potential on the inverting input negative ✓ ensuring that
                        the output remains stable at +VCC. ✓                                                   (2)

           3.4.3        When a positive trigger voltage greater than VREF is applied to the
                        inverting input its potential will be greater than the 0 V on the non-
                        inverting input ✓ causing the output to saturate to – VCC ✓ where it
                        will remain for the duration of the time constant determined by
                        C2 and R2. ✓                                                                           (3)
           3.4.4            Trigger pulse

                                      0           1     2    3     4        5   6   t (s)

                                             ✓                              ✓
                                   +9V

                                   VOUT
                                                                                    t (s)

                                                         ✓              ✓
                                   -9V
                                                                                                               (4)
                       NOTE: 1 mark for starting the output at +9 V
                             1 mark for the output changing from +9 V to -9 V at trigger
                             input
                             1 mark for the correct duration of the output state
                             1 mark for the return to +9 V
                             An inverted waveform will lose 1 mark for orientation.

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Electrical Technology: Digital Electronics              6                          DBE/November 2024
                                             NSC – Marking Guidelines

3.5        3.5.1                                       ✓
                                                 RF

                                                      +supply
                                             2           7

                                                   741
                                                                 6      Output
                                             3
                                                         4
                                                                     R1 ✓
                                                      - supply

                           ✓                       ✓
                                    C1                               R2

                                                                                                           (4)
           3.5.2        The output voltage of a 741 op amp astable multivibrator circuit
                        constantly changes between + VCC and -VCC ✓ whereas the output
                        of a 555 IC astable multivibrator circuit changes between +V CC
                        and 0 V. ✓                                                                         (2)
3.6        3.6.1        Variable resistor/Potentiometer R2 ✓                                               (1)
           3.6.2        Resistor R1 ✓
                        Thermistor ✓                                                                       (2)
           3.6.3        By adjusting variable resistor R2 ✓ the new reference voltage at
                        the inverting input will change. ✓                                                 (2)
3.7        Clean up signals in radio receivers. ✓
           Eliminate noise caused by switch bounce in digital circuits. ✓
           Changing of sine waves into square or rectangular waves
           Signal recovery after severe distortion.                                                        (2)
3.8        3.8.1        Variable resistor R4 provides negative feedback ✓ that controls the
                        gain of the circuit. ✓                                                             (2)
           3.8.2                         𝑅𝐹      𝑅𝐹     𝑅𝐹                                  ✓
                        𝑉𝑂𝑈𝑇 = − (𝑉1        + 𝑉2    + 𝑉3 )
                                         𝑅1      𝑅2     𝑅3
                                                 72000          72000         72000         ✓
                               = − (0,5 ×              + 0,45 ×       + 0,3 ×       )
                                                 10000          10000         10000
                               = −9 𝑉                                                       ✓
                                                                                                           (3)

           3.8.3        When RF = R1 = R2 = R3. ✓ They cancel each other out in the
                        formula giving VOUT = -(V1+V2+V3).
                        When R4 is set to 10 kΩ the overall circuit gain is 1.                             (1)

           3.8.4        When R4 is increased beyond 72 kΩ the gain of the amplifier
                        increases ✓ driving it into saturation and causing distortion on the
                        output. ✓                                                                          (2)

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Electrical Technology: Digital Electronics              7                   DBE/November 2024
                                             NSC – Marking Guidelines

3.9        3.9.1        A passive differentiator primarily performs mathematical
                        differentiation on an input signal, ✓ producing an output voltage
                        proportional to the rate of change of the input voltage. ✓                (2)

           3.9.2

                                                VIN

                                                  0

                                                          ✓

                                               VOUT
                                                                 ✓
                                                  0
                                                                        ✓

                       NOTE: The wave shape must be correct before any marks are
                             allocated.
                             1 mark for orientation
                             1 mark for each ½ cycle                                              (3)

3.10       In an op-amp differentiator a capacitor is connected to the inverting input and
           resistor used in the feedback loop. ✓
           In an op-amp integrator a resistor is connected to the inverting input with a
           capacitor in the feedback loop. ✓                                                      (2)
                                                                                                  [50]

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Electrical Technology: Digital Electronics              8                           DBE/November 2024
                                             NSC – Marking Guidelines

QUESTION 4: SEMICONDUCTOR DEVICES

4.1        4.1.1        FIGURE A - output voltage will be positive/high. ✓
                        FIGURE B - output voltage will be negative/low. ✓                                     (2)
           4.1.2        Small size ✓
                        Cheap ✓
                        Low power consumption
                        Highly stable
                        Highly reliable                                                                       (2)
           4.1.3        Common mode rejection ratio is the ability of an op-amp to
                        suppress common mode signals. ✓
                        The common mode rejection ratio is the ratio between the output
                        voltage to the common input voltage when the same signal is
                        applied simultaneously to both inputs.                                                (1)
4.2        4.2.1        Negative feedback. ✓                                                                  (1)
           4.2.2                             𝑅𝐹           ✓
                                𝐴𝑉 = −
                                             𝑅𝐼𝑁
                                                          ✓
                                       47 00
                                    =−
                                        470
                                    = −10                 ✓
                                                                                                              (3)
           4.2.3        𝑉𝑜𝑢𝑡 = 𝐴𝑉 × 𝑉𝐼𝑁                   ✓                               𝑅𝑓
                                                                        𝑉𝑂𝑈𝑇 = 𝑉𝐼𝑁 × (−       )
                             = −10 × 2 × 10−3                                             𝑅𝐼𝑁
                                                          ✓
                             = −0,02𝑉                           OR                          4700
                                                                        𝑉𝑂𝑈𝑇 = 0,002 × (−        )
                                                          ✓                                 470
                             = −20 𝑚𝑉
                                                                        𝑉𝑂𝑈𝑇 = −0,02 𝑉                        (3)
           4.2.4        The output voltage will be able to swing above ✓ and below ✓ the
                        zero levels.                                                                          (2)
4.3        4.3.1        Controlling the positioning of a servo device. ✓
                        Temperature measurement.
                        Timers in oven temperature control.
                        Oscillator as motor speed control.                                                    (1)
           4.3.2                                                              ̅ from the
                        The NPN transistor (T1) will only turn on when output Q
                        flip-flop goes high. ✓                                                                (1)
           4.3.3        When the inverting terminal voltage is higher, the comparator's
                        output will be low ✓                                                                  (1)
           4.3.4        It divides the supply voltage into three equal values. ✓
                        The resistors act as voltage dividers.                                                (1)

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Electrical Technology: Digital Electronics              9                          DBE/November 2024
                                             NSC – Marking Guidelines

           4.3.5        The 555 IC will be triggered ✓ and the output voltage at Pin 3 rises
                        near to the supply voltage ✓
                        NOTE: Due to the error in the schematic of the 555 IC, the
                        following response will be accepted:
                        When pin 2 falls below ⅓VCC, the output of comparator C2 will be
                        low, if R of the flip-flop is high, the circuit will be reset, if R is low,
                        the circuit will stay in its previous state.                                          (2)
                                                                                                              [20]

QUESTION 5: DIGITAL AND SEQUENTIAL DEVICES

5.1        5.1.1        Both grids A and B will only allow light waves that passes in a
                        vertical plane ✓ therefore allowing vertical light waves to pass from
                        point A to point B because the gridlines are in a vertical
                        position. ✓
                        Grid C will allow only vertical light waves to pass through, ✓
                        because the gridlines are in a vertical position. Grid D will block the
                        vertical light waves because the gridlines are in a horizontal
                        position. ✓                                                                           (4)

           5.1.2        Each pixel in the matrix is controlled by its own thin film transistor✓
                        that turns the energising voltage on or off. ✓
                        The transistor array requires careful control for them to turn their
                        pixels on and off ✓ at the correct times to create a picture.
                        By energising different pixels by means of a transistor, the pixels
                        will become visible and the combined visible pixels will form a
                        coherent number or letter.                                                            (3)

5.2        5.2.1
                                                 ✓
                                 A

                                                 ✓
                                 B
                                                                            ✓
                                                                        0       Output W

                                                                            ✓
                                                                        1       Output X

                                                                            ✓
                                                                        2       Output Y

                                                                            ✓
                                                                        3       Output Z

                                                                                                              (6)
                                                               OR

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Electrical Technology: Digital Electronics             10                              DBE/November 2024
                                             NSC – Marking Guidelines

                         A             1

                         B             1

                                                                              &             Output W

                                                                               &             Output X

                                                                              &              Output Y

                                                                              &              Output Z

           5.2.2                  Inputs                                    Outputs
                              A               B           W             X             Y         Z
                              1               0                                       1✓
                              1               1                                                1✓
                              0               0           1✓
                              0               1                         1✓                                    (4)

5.3                                                            ✓
            Ci
                                                                                                    Ʃ

                                   ✓                           ✓                   ✓
             A
                                                                                                    Co
             B
                                   ✓

                                                                                                              (5)

                                                          OR

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Electrical Technology: Digital Electronics             11                            DBE/November 2024
                                             NSC – Marking Guidelines

            Ci                                             =1
                                                                                                    Ʃ

                                                                &
             A                    =1                                             >=1
                                                                                                    Co
             B

                                   &

5.4        5.4.1         D
                                                                ✓
                                                                                        ✓               Q

                                   CLK                                           ✓

                                                                                        ✓               Q
                                                            ✓
                                           ✓
                                                                                                               (6)

                                                                    OR

                         D
                                                           &                      >=1                   Q

                                     CLK

                                                                                  >=1
                                           1
                                                           &                                            Q

                        NOTE:        1 mark for each correctly placed gate = 5
                                     1 mark for latch = 1
                                     If a candidate draws the circuit with NAND gates only, full
                                     marks will be awarded.

           5.4.2               CLK                     D                  Q                 Q
                                 0                     0                 Latch          Latch
                                 0                     1                 Latch          Latch
                                 1                     0                  0 ✓            1 ✓
                                 1                     1                  1 ✓            0 ✓                   (4)

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Electrical Technology: Digital Electronics             12                       DBE/November 2024
                                             NSC – Marking Guidelines

5.5

                        Input                       1           2       3
                     Clock pulses

                                                      ✓           ✓     ✓
                          Output A

                          Output B                    ✓             ✓       ✓
                                                                                                      (6)

5.6        Pulse triggered allows the circuit to change state ✓ during the 'high' period of
           a clock pulse. ✓

           Edge triggered is where the flip-flop changes state at the rising edge ✓ or
           falling edge ✓of the waveform.                                                             (4)

5.7        5.7.1        A frequency divider is a counter that divides the input frequency of
                        each preceding stage, ✓ resulting in a ripple effect of successive
                        stages dividing the frequency of the chain of flip-flops. ✓                   (2)

           5.7.2        A decade counter is a binary counter designed to count from 0000
                        (decimal 0) to 1001 (decimal 9) ✓ and resets ✓ itself back to 0000
                        (decimal 0)                                                                   (2)

5.8        5.8.1        Parallel - In: Serial-out ✓shift register                                     (1)

           5.8.2        A = 4-bit Parallel Data Input✓
                        B = Serial Data Output ✓                                                      (2)

           5.8.3        All four bits of the data are introduced to the register at the same
                        time, ✓ but once stored, ✓the data is shifted out one bit at a time ✓
                        controlled by the clock input cycle.                                          (3)

           5.8.4        Four ✓                                                                        (1)

           5.8.5        It enables parallel data to be converted into serial data. ✓
                        It is able to mix a number of input lines together into a single serial
                        stream of data. ✓                                                             (2)
                                                                                                      [55]

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Electrical Technology: Digital Electronics             13                     DBE/November 2024
                                             NSC – Marking Guidelines

QUESTION 6: MICROCONTROLLERS

6.1        A microcontroller is a computer presented in a single integrated circuit ✓
           which is dedicated to perform a task/s ✓ and execute one specific
           application.✓

                                                          OR

           A microcontroller is an independent device, a computer on a chip that can
           perform a limited range of functions without needing to rely on other chips or
           devices.                                                                                  (3)

6.2        6.2.1        A = Memory✓ (RAM & ROM)
                        B = Accumulator✓                                                             (2)

           6.2.2        The control unit manages the process of moving data ✓ into and out
                        of the memory ✓ and carry out program instructions one at a time ✓
                        in an ordered sequence.✓                                                     (4)

           6.2.3        The function of the ALU is to carry out calculations ✓ and do a
                        comparison on the data. ✓                                                    (2)

6.3        Discrete logic consists of a single processor with many separate logic chips.✓

                                                          OR

           Discrete logic is a term that refers to logic circuits that consists of many
           separate logic components.

           Integrated logic consists of the entire processor on a single chip. ✓                     (2)

6.4        The accumulator stores data ✓ that is needed as part of any arithmetic
           operation. ✓                                                                              (2)

6.5        6.5.1        The function of the system bus is to pass information, data and
                        instructions ✓ between the respective parts of the
                        microcontroller ✓ by using interconnecting 'tracks' ✓ as well as to
                        communicate with the 'outside world' through the control bus, data
                        bus and the address bus. ✓                                                   (4)

           6.5.2        Synchronous communication supports a higher data transfer rate.✓
                        The sender and the receiver use the same clock pulse. ✓
                        The same clock pulse is used to send and receive data.                       (2)

           6.5.3        Requires more communication lines to transfer data. ✓
                        Requires more space. ✓
                        Requires larger connections.                                                 (2)

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Electrical Technology: Digital Electronics             14                     DBE/November 2024
                                             NSC – Marking Guidelines

6.6        Half duplex communication is where the two devices take turns in
           communicating, ✓ one after the other. ✓
           Full-duplex communication is where the two devices can both transmit and
           receive ✓ at the same time. ✓                                                             (4)

6.7        6.7.1        Serial data line ✓                                                           (1)

           6.7.2        Pull-up resistors, connected to a +5 V supply, are necessary for the
                        lines (SCL and SDA) ✓ to go high. ✓                                          (2)

           6.7.3        I2C has slower speed ✓
                        I2C draws more power than SPI ✓
                        I2C can be locked up by one device that fails to release the
                        communication bus.                                                           (2)

           6.7.4        •   The master issues a start sequence on the I2C bus to the slave
                            to transfer data. ✓
                        •   This data will be transferred in sequence of 8 bits (byte) through
                            the serial data line starting with the MSB to the LSB ✓
                        •   The serial clock line will then pulse high and low during the data
                            transfer process ✓
                        •   For every 8 bits transferred, the device receiving the data sends
                            back a low acknowledgement bit as an indication that it is ready
                            to receive the next 8 bits (byte). ✓
                        •   If the device receiving the data sends back a high
                            acknowledgement bit, which is an indication that the device
                            cannot accept any further data, ✓ then the master will terminate
                            any further instruction to the slave by sending a stop bit. ✓            (6)

6.8        6.8.1        A program is a sequence of instructions ✓ that informs a computer
                        how to perform a task. ✓                                                     (2)

           6.8.2        A flow diagram is a visual representation of steps and decisions ✓
                        needed to perform and complete a process. ✓                                  (2)

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Electrical Technology: Digital Electronics             15                     DBE/November 2024
                                             NSC – Marking Guidelines

6.9
                                          Start

                                                  ✓                                ✓
                                   Sensor 1?                            Sensor2?
                                                    No
                                                                                   No
                                   Yes
                                                  ✓                     Yes
                                                                               ✓

                                                         ✓
                                       Alarm
                                      on

                                                  ✓
                                      Reset ?
                                                    No
                                    Yes
                                                  ✓
                                       Alarm
                                       off
                                                      ✓

           NOTE:      1 mark for each correct labelled symbol = 5
                      1 mark for each correctly placed Yes/No = 3                                 (8)
                                                                                                  [50]

                                                                                        TOTAL:    200

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