Electrical Technology PAT GR 11 2017 Eng

Downloaded from hlayiso.com ELECTRICAL TECHNOLOGY GUIDELINES FOR PRACTICAL ASSESSMENT TASKS GRADE 11 2017 These guidelines consist of 55 pages. Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 2 DBE/PAT 2017 NSC – Grade 11 TABLE OF CONTENTS 1. INTRODUCTION 3 2. TEACHER GUIDELINES 4 2.1 How to administer the PATs 4 2.2 How to mark/assess PATs 5 2.3 PAT assessment management plan 6 2.4 Moderation of the PATs 7 2.5 Absence/Non-submission of tasks 7 2.6 Simulations 7 2.7 Projects 8 2.8 Working mark sheet 9 3. LEARNER GUIDELINES 10 3.1 Instructions to the learner 11 3.2 Declaration of authenticity (COMPULSORY) 11 4. SIMULATIONS 12 4.1 Simulation 1: Generic 12 4.2 Simulation 2: Generic 16 4.3 Simulation 3: Power systems 21 4.4 Simulation 4: Power systems 23 4.5 Simulation 5: Power systems 25 4.6 Simulation 6: Power systems 29 4.7 Simulation 7: Electronics and digital electronics 35 4.8 Simulation 8: Electronics and digital electronics 39 5. SECTION B: DESIGN AND MAKE 44 5.1 Design and make: Part 1 45 5.1.1 Circuit diagram 45 5.1.2 Project: Description of operation 45 5.1.3 Component list 46 5.1.4 Tool/Instrument list 46 5.1.5 Evidence of prototyping 46 5.1.6 Vero-board planning/PCB design 47 5.2 Assessment of the design and make phase: Part 1 48 5.3 Design and make: Part 2 50 5.4 Assessment of the design and make phase: Part 2 52 6. PROJECTS 53 6.1 Traffic light 53 6.2 Regulated power supply 54 6.3 Radio transmitter 55 Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 3 DBE/PAT 2017 NSC – Grade 11 1. INTRODUCTION The 16 Curriculum and Assessment Policy Statement subjects which contain a practical component all include a practical assessment task (PAT). These subjects are: • AGRICULTURE: Agricultural Management Practices; Agricultural Technology • ARTS: Dance Studies; Design; Dramatic Arts; Music; Visual Arts • SCIENCES: Computer Applications Technology; Information Technology • SERVICES: Consumer Studies; Hospitality Studies; Tourism • TECHNOLOGIES: Civil Technology; Electrical Technology; Mechanical Technology; Engineering Graphics and Design A practical assessment task (PAT) mark is a compulsory component of the final promotion mark for all learners who offer subjects that have practical components and counts 25% (100 marks) of the end-of-year examination mark. The PAT is implemented across the first three terms of the school year. This is broken down into different phases or a series of smaller activities that make up the PAT. The PAT allows for learners to be assessed on a regular basis during the school year and it also allows for the assessment of skills that cannot be assessed in a written format, e.g. test or examination. It is therefore important that schools ensure that all learners complete the practical assessment tasks within the stipulated period to ensure that learners are promoted at the end of the school year. The planning and execution of the PAT differs from subject to subject. Practical assessment tasks are designed to develop and demonstrate a learner's ability to integrate a variety of skills in order to solve a problem. The PAT also uses a technological process to inform the learner what steps needs to be followed to derive a solution for the problem. The 2017 PAT has three focus areas with projects and simulations in each of the following fields: • Electrical • Electronics • Digital Electronics The PAT task consists of four simulations and a practical project. The teacher may choose any relevant practical project and use a combination of the simulations available. The teacher has to apply assessment on an on-going basis while the learner is developing the required skills. The learners should complete four simulations and also manufacture a practical project. The PAT incorporates all the skills the learner developed throughout the year. The PAT ensures that all the different skills will have been acquired by learners on completion of the practical work, that is electrical, analogue and digital electronics as well as the correct use of tools and instruments. Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 4 DBE/PAT 2017 NSC – Grade 11 Requirements for presentation Each learner must present the following: • PAT file with all the evidence of simulations, design and prototyping. A copy of the PAT 2017 cover page and the relevant simulations and assessment sheets should be copied and handed to each learner to include in the file. • Practical project with: o Enclosure  The file must include a design.  The enclosure and the design must match.  No cardboard boxes are allowed.  Plastic and metal enclosures are acceptable.  The enclosure should be accessible for scrutiny inside.  Lids that are secured with screws are preferred. o Circuit board  The file should include the PCB design.  The PCB must be mounted inside the enclosure in such a manner that it may be removed for scrutiny.  Switches, potentiometers, connectors and other items must be mounted.  Wiring must be neat and bound/wrapped.  Wiring must be long enough to allow for the PCB to be removed and inspected with ease. o Logo and Name  The file should contain the logo and name design.  Logo and name must be prominent on the enclosure. The PAT will have a financial impact on the school's budget and school management teams are required to make provision to accommodate this particular expense. PAT components and other items must be acquired timely for use by the learners before the end of the first term at the start of the academic year. It is the responsibility of the HOD to ensure that the teacher is progressing with the PAT from the start of the school year. Provincial departments are responsible for setting up moderation timetables and consequently PATs should be completed in time for moderation. 2. TEACHER GUIDELINES 2.1 How to administer the PATs Teachers must ensure that learners complete the simulations required for each term. The project should be started in January in order to ensure its completion by August. All formal assessment is the teacher's responsibility. The PAT should be completed during the first three terms and must be ready at the start of PAT moderation. Teachers must make copies of the relevant simulations and hand them to learners at the beginning of each term. The PAT must not to leave the workshop and must be kept in a safe place at all times when the learner is not working on it. Adhere to the weightings of the PAT and teachers are not allowed to change the weightings of the different sections. Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 5 DBE/PAT 2017 NSC – Grade 11 2.2 How to mark/assess the PATs The PAT for Grade 11 will be set and assessed internally, but externally moderated. All formal assessment will be done by the teacher. The teacher is required to produce a working model and model answer file which sets the baseline for assessment at a Highly Competent Level for every project choice exercised by the learners. This file must include all the simulations with answers the teacher has done him-/herself. The teacher will use the model answers and project to assess the simulations and projects of the learners. Once a facet sheet has been completed by the teacher, assessment will be deemed to be complete. No re-assessment will be done once the facet sheets have been completed and captured by the teacher. Learners must ensure that the work is done to the standard required before the teacher finally assesses the PAT during each stage of completion. Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 6 DBE/PAT 2017 NSC – Grade 11 2.3 PAT assessment management plan The assessment plan for the PAT is as follows: TIME FRAME ACTIVITY RESPONSIBILITY Preparation for Teacher – Builds the models and works out the model answers PAT 2017 for the simulations for 2017. Identifies shortages in tools, equipment and consumable items for simulations which must be procured in 2017. SMT – Receives procurement requests from teachers and processes payments for the acquisition of required items. January to March 2017 Simulations 1 Teacher – Copies and hands out simulations. and 2 Learners – Complete simulations. Teacher – Assesses simulations. HOD – Checks if tasks have been completed and marked by the teacher before the holiday. January 2017 PAT Project: Teacher – Obtains quotations for PAT projects. Procurement Principal – Approves PAT procurement for PAT projects. Teacher – Ensures that PAT projects are ordered and delivered. HOD – Checks on teacher to see if the process is adhered to. February 2017 PAT Project: Teacher – Ensures that there is secure storage for PAT Learners projects. commence with Teacher – Hands out and takes in PAT projects. project. Teacher – Includes practical sessions for learners to complete PAT project every week. Learners – Commence with completion of the PAT project. HOD – Checks on teacher to ensure that practical workshop sessions take place weekly. April to June 2017 Moderation of District Subject Facilitator/Subject Specialist will visit the school Simulations and moderate Simulations 1 and 2. 1 and 2 10% of learners' work is moderated. April to June 2017 Simulations 3 Teacher – Copies and hands out simulations. and 4 Learners – Completes simulations. Teacher – Assesses simulations. HOD – Checks if tasks have been completed and marked by the teacher before the holiday. April to June 2017 PAT project: Teacher – Ensures that there is secure storage for PAT Learners projects. continue with Teacher – Hands out and takes in PAT projects. project Teacher – Includes practical sessions for learners to complete PAT project every week. Learners – Continue with completion of the PAT project. HOD – Checks on teacher to ensure that practical workshop sessions take place on a weekly basis. July holiday 2017 PAT Learners who are behind on the PAT are required to complete intervention the project during this holiday. July to August 2017 Moderation of District Subject Facilitator/Subject Specialist will visit the school Simulations 3 and moderate Simulations 3 and 4. Different learners from the and 4 previous term. 10% of learners' work is moderated. July to August 2017 PAT project: Teacher – Ensures that there is secure storage for PAT completion projects. Teacher – Hands out and takes in PAT projects. Teacher – Completes the PAT project with learners and compiles the PAT file. Learners – Complete the PAT project and file. HOD – Checks to see that 100% of PAT files and project are completed and assessed September to October 2017 PAT moderation PAT projects are moderated by provincial subject facilitators/ subject specialists and learners should be available to demonstrate skills. 10% of learners are moderated at random. Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 7 DBE/PAT 2017 NSC – Grade 11 2.4 Moderation of PATs Provincial moderation of each term's simulations will start as early as the following term. Simulations 1 and 2 should be moderated as soon as the second term starts. Similarly, simulations 3 and 4 should be moderated in July. However, the project should only be moderated on completion. During the moderation of the PAT the learner's file and project must be presented to the moderator. The moderation process is as follows: • During moderation learners are randomly selected to demonstrate the various simulations of the PAT. All four simulations will be moderated. • The teacher is required to build an exemplar model for each type of project chosen for the school. • This model must be on display during moderation. • The teacher's model forms the standard of the moderation at Level 4 (Highly Competent). • Level 5 assessments must exceed the model of the teacher in skill and finishing. • Learners being moderated will have access to their files during moderation and may refer to the simulations they completed earlier in the year. • Learners may not ask assistance from other learners during moderation. • All projects and files must be on display for the moderator. • If a learner is unable to repeat the simulation or cannot produce a working circuit during moderation, marks will be deducted and circuits will be assessed as not being operational. • The moderator will randomly select not fewer than two projects (not simulations) and the learners involved will have to explain how the project was manufactured. • Where required, the moderator should be able to call on the learner to explain the function and principles of operation and also request the learner to exhibit the skills acquired through the simulations for moderation purposes. • On completion the moderator will, if needed, adjust the marks of the group up or downwards, depending on the outcome of moderation. • Normal examination protocols for appeals will be adhered to if a dispute arises from adjustments made. 2.5 Absence/Non-submission of tasks In the absence of a PAT mark in Electrical Technology, without a valid reason, the learner will be given three weeks before the commencement of the final end-of-year examination to submit the outstanding task(s). Should the learner fail to fulfill the outstanding PAT requirement, such a learner will be awarded a zero for that PAT component. 2.6 Simulations Simulations are circuits, experiments and tests which the learner will have to build, test and measure and do practically as part of the development of practical skills. These skills have to be illustrated to the external moderator who visits the school at intervals during the school year. Teachers who use simulation programs on computers are welcome to use them for learners to practise on. However, it is required that the circuit be built using real components and that measurements be made with actual instruments for the purposes of assessment and moderation. Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 8 DBE/PAT 2017 NSC – Grade 11 The correct procedure to complete simulations is outlined below for teachers and school management teams who are responsible for the implementation of the PAT in Electrical Technology. Step 1: The teacher will choose simulations from the examples provided. Step 2: Compile a list of the components needed for every simulation. Add extra components as these items are very small and you will need extras because they are lost/damaged very easily when learners work with them. Step 3: Contact three different electronic component suppliers for comparative quotations. Step 4: Submit the quotations to the SMT for approval and procurement of the items. Step 5: Store the components. Collate items for each simulation, thus making it easier to distribute and use during practical sessions. Ensure that the various component values do not get mixed up, as this will lead to components being used incorrectly. This could damage the component and, in extreme cases, the equipment used. Step 6: Copy the relevant simulations and hand them out to learners at the start of the term. Teachers are allowed to adjust circuits and component values to suit their environment/resource availability. Teachers are required to develop a set of model answers in the teacher's portfolio. Moderators will use the teacher's model answers and artefact when moderating. 2.7 Projects The projects are construction projects which teachers may choose for their learners. These projects are based on proven circuits provided by schools and subject advisors. The projects are based on working prototypes and require careful construction in order for them to operate correctly. Projects vary in cost and teachers must ensure that the projects chosen fall within the scope of the school's budget. Once the teacher has decided on a circuit, he/she must construct the prototype. Thereafter copies of the circuit provided may be made and distributed to learners. Learners MUST redraw these circuits in their portfolios correctly. The description of the operation of the circuits is NOT complete. Learners are required to interrogate the function of the components in the circuit provided. They should elaborate on the purpose of components in the circuit. It is recommended that learners investigate similar circuits available on the Internet and in the school library/workshop reference books. Copyright reserved Please turn over

Electrical Technology Downloaded from hlayiso.com 9 DBE/PAT 2017 NSC – Grade 11 2.8 Working mark sheet (A working Excel file is provided with this PAT.) PAT MARK SHEET TERM 1 TERM 2 PROJECT Total = Term1 + Mark out of 100 Moderated Mark Term 2 + Design Design Project Simulation Simulation Simulation Simulation and and 1 2 3 4 Make Make 250 Part 1 Part 2 No. Name of Learner 40 40 40 40 70 20 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Total Average Teacher Name: Principal Name: Moderator Name: Signature: Signature: Signature: SCHOOL STAMP Date: Date:_______________________ Date:__________________

Downloaded from hlayiso.com Electrical Technology 10 DBE/PAT 2017 NSC – Grade 11 3. LEARNER GUIDELINES PAT 2017 Cover Page (Place this page at the front of the PAT.) Department of Basic Education CAPS for Technical High Schools Grade 11 Practical Assessment Task Electrical Technology Time Allowed: Term 1 to Term 3 (2017) Learner Name: Class: School: SPECIALISATION (Tick your specialisation): Electrical (Power systems):  (Simulation 1, 2, 3, 4, 5 & 6) (Any 4) Electronics:  (Simulation 1, 2, 7, & 8) Digital Electronics:  (Simulation 1, 2, 7, & 8) Project (Write the name of the project): ___________________________________ EVIDENCE OF MODERATION: NOTE: When the learner evidence (LE) selected has been moderated at school level, the table will contain evidence of moderation. Provincial moderators will sign the provincial moderation and only sign if re-moderation is needed. Moderation Signature Date Signature Date School-based Provincial Re-moderation moderation MARK ALLOCATION: PAT Component Maximum Learner mark Moderated mark mark Simulation 1 40 Simulation 2 40 Simulation 3 40 Simulation 4 40 Design and Make Project – Circuit 70 Design and Make Project – Enclosure 20 Total 250 Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 11 DBE/PAT 2017 NSC – Grade 11 3.1 Instructions to the learner • • This PAT counts 25% of your final promotion mark. • All work produced by you must be your own effort. Group work and co-operative work are not allowed. • The PAT must be completed over three terms. • The PAT file must contain ANY 4 simulations and a practical project. • Calculations should be clear and include units. Calculations should be rounded off to TWO decimals. SI units should be used. • Circuit diagrams may be hand-drawn or drawn on CAD. NO photocopies or scanned files are allowed. • Photographs are allowed and may be in colour or greyscale. Scanned photographs and photocopies are allowed. • This document must be placed inside your PAT file together with the other evidence. • Learners with identical photographs will be penalised and receive zero (0) for that section. 3.2 Declaration of authenticity (COMPULSORY) Declaration: I (Name) herewith declare that the work represented in this evidence is entirely my own effort. I understand that if proven otherwise, my final results will be withheld. Signature of learner Date As far as I know, the above declaration by the learner is true and I accept that the work offered is his or her own. Signature of teacher Date Signature of principal Date SCHOOL STAMP Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 12 DBE/PAT 2017 NSC – Grade 11 4. SIMULATIONS 4.1 Simulation 1: Generic Name of learner: …………………………………………... Grade: ………... Date: …………… Practical: Use the oscilloscope to display voltage wave forms supplied by a function generator. Requirements: Function generator Oscilloscope Probes (Leads) Multimeter Instructions: 4.1.1 Switch on the function generator and select the sine wave function at a frequency of 50 Hz and set the amplitude to maximum. The learner was able to do The learner was able to do The learner was able to do a minimal part of the a part of the activity the activity correctly, activity correctly, correctly, without without assistance. without assistance. assistance. 1 2 3 (3) 4.1.2 Switch on the oscilloscope. Set the time base and voltage base to show a clear sinusoidal waveform. The learner was able to do The learner was able to do The learner was able to do a minimal part of the a part of the activity the activity correctly, activity correctly, correctly, without without assistance without assistance assistance 1 2 3 (3) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 13 DBE/PAT 2017 NSC – Grade 11 4.1.3 Connect the probe from the function generator output to the channel 1 input of the oscilloscope and sketch what you observe on the oscilloscope display below. (5) Change the waveform produced by the function generator, using the function selector to produce (a) square waveforms, and (b) triangular waveforms. Sketch what you observe in each case. Square wave (5) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 14 DBE/PAT 2017 NSC – Grade 11 Triangular wave (5) 4.1.4 The teacher now changes the waveform produced by the function generator and covers it. He also changes the oscilloscope settings. (a) Name the waveform and sketch it on the grid provided. (6) (b) Determine the period of the waveform. (3) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 15 DBE/PAT 2017 NSC – Grade 11 (c) Determine the frequency of the waveform. (3) (d) Determine the peak of the waveform. (3) 4.1.5 Housekeeping The learner did no The learner did The learner did housekeeping duties. housekeeping after housekeeping without being reminded. being reminded. 1 2 4 (4) [40] Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 16 DBE/PAT 2017 NSC – Grade 11 4.2 Simulation 2: Generic Name of learner: …………………………………………... Grade: ………... Date: …………… Practical: RLC Investigate the voltages across a lamp, an inductor and a capacitor at a specific voltage setting and a range of frequencies. Resources: Breadboard/Prototype board Function generator Dual-trace oscilloscope Probes (Leads) Multimeter x 2 1 µF capacitor 820 µH coil 50 mA/6 V lamp Instructions: 4.2.1 Construct the circuit shown below. Set the function generator to sine wave and adjust the voltage to around 5 to 6 V. Once the voltage is set do not change the amplitude setting of the voltage. Set the amplitude settings on the oscilloscope to the same for both channel 1 and channel 2. VC V 50mA / 6V 820µH X 1µF V VL Function Generator f (a) Adjust the frequency of the function generator until the reading on both meters is the same. Record the reading of the frequency and voltages across each component. VC VL f (3) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 17 DBE/PAT 2017 NSC – Grade 11 (b) State the value of the frequency at this setting. Explain why it is this value. (3) (c) Adjust the frequency above this value and record the values of the voltages across the capacitor and resistor. Describe the reason for the readings on the meters. VC VL (2) (d) Adjust the frequency below this value and record the values of the voltages across the capacitor and resistor. Describe the reason for the readings on the meters. VC VL (2) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 18 DBE/PAT 2017 NSC – Grade 11 4.2.2 Connect an ammeter in the circuit to measure the current flow in the circuit, as shown below. VC V 50mA / 6V 820µH X 1µF A IM V VL Function Generator f (a) Adjust the frequency of the function generator until the reading on the meter is at the maximum. Record the reading of the frequency and the current reading. IM f (2) (b) Describe the state of the frequency when the current is at the maximum. (2) (c) Adjust the frequency above this value and record the value of the current. Describe the reason for the reading. I (1) (d) Adjust the frequency below this value and record the value of the current. Describe the reason for the reading. I (1) (1) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 19 DBE/PAT 2017 NSC – Grade 11 4.2.3 Connect the oscilloscope to the circuit, as shown below. Connect channel 1 across the lamp and channel 2 across the supply. Adjust the frequency of the function generator to obtain resonant frequency by observing the changing waveforms on the oscilloscope. Channel 1 Oscilloscope 820µH X 50mA / 6V 1µF Channel 2 Function Generator f Oscilloscope (a) Draw the waveforms at resonant frequency. (3) (b) Describe why the waveforms are this shape. (3) (c) Adjust the frequency of the function generator and describe what happens to the shape of the waveforms. (3) [25] Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 20 DBE/PAT 2017 NSC – Grade 11 FACET SHEET: SIMULATION: RLC SERIES CIRCUIT Task Mark Allocation (Tick the appropriate level next to the task descriptor.) Description 1 2 3 4 5 Not achieved Not competent Competent Highly Outstanding yet Competent Breadboard The learner The learner The learner The learner The learner was able planning was unable to was able was able to plan was able to plan to plan successfully and and layout plan the board identify the and place the successfully place all the layout using the correct 3 components and place all the components correctly on circuit diagram components correctly on the components the breadboard provided. and meters. breadboard. correctly on the connected to the breadboard with function generator. links. Trouble- The learner's The circuit The circuit The circuit The circuit was shooting circuit was not was complete, was complete was complete complete and the complete and but not and the learner and the learner learner was able to he/she was functional. was able to was able to identify and rectify all unable to The learner was identify and identify and the mistakes. conduct trouble- unable to rectify 1 rectify 2 shooting. identify the mistake. mistakes. problem. Instrument The learner The learner The learner The learner The learner selected selection was unable to selected and was able to was able to instruments quickly and and use select and use used the select the select and use without the help of the any incorrect correct all instruments teacher. The learner instruments. instruments. instruments, but correctly. was also able to use used them instruments correctly in incorrectly/ a safe, ergonomic unsafely. manner. Facet Sheet: (15) Questions (25) Total (40) [40] Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 21 DBE/PAT 2017 NSC – Grade 11 4.3 Simulation 3: Power Systems Name of learner: …………………………………………... Grade: ………... Date: …………… Practical: Connect a single-phase step-down transformer to a load. The load must consist of two 24 V lamps which will give a visual output. Resources: Digital multimeter 220 V to 24 V single-phase transformers 24 V lamps x 2 Lamp holders x 2 Probes (Leads) Instructions: 4.3.1 Draw and label the circuit. The circuit must show two lamps connected to the transformer and the meter connections. (8) 4.3.2 Connect a single-phase step-down transformer to a load. (a) Correct connection to supply (4) (b) Correct connection to load (4) (c) Safety precautions observed (4) 4.3.3 Measure the primary and the secondary voltages. (One mark for the reading; one mark for the correct meter use.) (a) VP (2) (b) VS (2) 4.3.4 Measure the primary and secondary currents. (a) IP (2) (b) IS (2) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 22 DBE/PAT 2017 NSC – Grade 11 4.3.5 Connect an additional identical load to the original load and measure the same values. Comment on each value. (a) VP (3) (b) VS (3) (c) IP (3) (d) IS (3) [40] Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 23 DBE/PAT 2017 NSC – Grade 11 4.4 Simulation 4: Power Systems Name of learner: …………………………………………... Grade: ………... Date: …………… Practical: PLC Programming Resources: Overload unit Start button Stop button Conductors Lamps PLC trainer/simulator (Includes: Power supply, PLC, 8 x switches for input simulation, 4 x output status LEDs, a programming cable and software) A computer Contactor Instructions: 4.4.1 Draw the control circuit of a DoL starter. (4) 4.4.2 Draw the ladder diagram of a DoL starter. (4) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 24 DBE/PAT 2017 NSC – Grade 11 4.4.3 With the aid a computer, write a program for the PLC for a direct-on-line control system. (5) 4.4.4 Test the program on the computer. Program does Program works at Program works at Program works at not work third attempt second attempt first attempt 0 1 3 5 (5) 4.4.5 Load the program from the computer to a PLC. Could not load Loads the program Loads the program Loads the program the program with too much with minimum without assistance assistance assistance 0 1 3 5 (4) 4.4.6 Draw a circuit diagram for the PLC to control a light. (5) 4.4.7 Connect the unit to control a light. (3) 4.4.8 Test the circuit. (5) 4.4.9 Load an existing program from a PLC onto a computer. (5) [40] Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 25 DBE/PAT 2017 NSC – Grade 11 4.5 Simulation 5: Power Systems Name of learner: …………………………………………... Grade: ………... Date: …………… Practical: Capacitor-start motors and capacitor-start-and-run motors To develop skills for the identification and connection of capacitor-start and capacitor-start-and- run motors Resources: Multimeter Clamp meter Insulation tester Demountable single-phase motor set Instructions: 4.5.1 Perform the following tests on a demountable capacitor-start motor. (a) Visual: Name FOUR parts checked and state whether they passed or failed the test. (4) (b) Continuity of windings Start winding Continuity: Yes No (1) Resistance: Give value: (1) Run winding Continuity: Yes No (1) Resistance: Give value: (1) Comment on readings (2) (c) Insulation resistance test between windings and earth using the insulation tester Reading: (1) Comment on reading (3) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 26 DBE/PAT 2017 NSC – Grade 11 (d) Insulation resistance test between windings using the insulation tester Reading (1) Comment on reading (3) (e) Centrifugal switch Explain the reason for the test and write down the readings. (3) Reading: Open Reading; Closed (2) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 27 DBE/PAT 2017 NSC – Grade 11 4.5.2 Wire the motor, as shown in the circuit diagram below. 2 3 5 1 6 4 (a) Correct identification of parts. (6) (b) Correct wiring (See facet sheet below) Task Mark Allocation (Tick the appropriate level next to the task description.) Description 1 2 3 4 5 Not achieved Not Competent Highly Outstanding competent yet competent Motor The learner The learner The learner The learner The learner Connection was unable to made three made two made one error was able to wire the motor errors errors wire the entire motor correctly (5) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 28 DBE/PAT 2017 NSC – Grade 11 4.5.3 Wire the motor as per circuit diagram. 2 3 7 5 1 6 4 (a) Identification of additional part. (1) (b) Correct wiring (See facet sheet below) Task Mark Allocation (Tick the appropriate level next to the task description.) Description 1 2 3 4 5 Not achieved Not Competent Highly Outstanding competent yet competent Motor The learner The learner The learner The learner The learner Connection was unable to made three made two made one error was able to wire the motor errors errors wire the entire motor correctly (5) [40] Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 29 DBE/PAT 2017 NSC – Grade 11 4.6 Simulation 6: Power Systems Name of learner: …………………………………………... Grade: ………... Date: …………… Practical: DC motor Explain the working principle of a DC motor. Identify the parts a DC machine and the function of each. Connection of a DC machine in series, shunt and compound configurations. Perform the insulation resistance test and continuity test on motor windings. Resources: Function generator Oscilloscope Leads (Probes) Multimeter Instructions: 4.6.1 Disassemble a DC machine. Identify the following parts of a DC machine and explain the function of each one: (a) Armature (2) (b) Commutator (2) (c) Brushes (2) (d) Yoke (2) (e) Name plate (2) (f) Field windings (2) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 30 DBE/PAT 2017 NSC – Grade 11 (g) Lap winding vs. wave winding (Draw) (2) (h) Poles (2) (i) Interpoles (2) 4.6.2 Connect a DC motor in the following configurations with the load and observe the speed of the motor: (a) Series (i) Correct connection (4) (ii) Comment on speed before connection to a load and after connection to load (2) (b) Shunt (i) Correct connection (4) (ii) Comment on speed before connection to load and after connection to load (2) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 31 DBE/PAT 2017 NSC – Grade 11 4.6.3 Perform the following: (a) Insulation resistance test on motor windings: (i) Selection of correct meter (1) (ii) Correct setting of meter (1) (iii) Correcting connection of meter on motor (1) (iv) Correct reading (2) (b) Continuity test on motor windings: (i) Selection of correct meter (1) (ii) Correct setting of meter (1) (iii) Correcting connection of meter on motor (1) (iv) Correct reading (2) [40] Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 32 DBE/PAT 2017 NSC – Grade 11 4.7 Simulation 7: Electronics and digital electronics Name of learner: …………………………………………... Grade: ………... Date: …………… Practical: Clipping and clamping circuits on breadboard using diodes Resources: TOOLS AND INSTRUMENTS MATERIALS Breadboard 0,5 mm hook-up wire Side cutters 470 Ω resistor Combination pliers 10 kΩ Multimeter 1 MΩ Oscilloscope 1 x diode (1N4001) Function generator 4 x1,5 V cells and cell holder A capacitor Instructions: 4.7.1 Construct the simple series clipper circuit in FIGURE 4.7.1 below, on the breadboard in FIGURE 4.7.2 below. Draw the component layout on the figure. Set the function generator at max output voltage and a frequency of 1 kHz. Connect the signal generator across the input of the circuit (Vi). Connect the one probe of the oscilloscope across the output of the circuit (Vo), and the other probe across the input (Vi). Ensure that the earth terminals of both the oscilloscope and function generator are connected to the same point. D D = 1N4148 VIN R VOUT R = 10 kΩ FIGURE 4.7.1 FIGURE 4.7.2 (4) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 33 DBE/PAT 2017 NSC – Grade 11 Connect the circuit to the function generator (as the input) and to the oscilloscope (as the output) only after it has been checked and approved by the teacher. Sketch the input and the output waveforms on the display in FIGURE4.7.3 below. FIGURE 4.7.3 (4) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 34 DBE/PAT 2017 NSC – Grade 11 4.7.2 Construct the series biased clipper circuit in FIGURE 4.7.4 below on the breadboard in FIGURE 4.7.5 below. Draw the component layout on the figure. FIGURE 4.7.4 FIGURE 4.7.5 (4) Connect the circuit to the function generator (as the input) and to the oscilloscope (as the output) only after it has been checked and approved by the teacher. Sketch the input and the output waveforms on the display in FIGURE4.7.6 below. FIGURE 4.7.6 (4) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 35 DBE/PAT 2017 NSC – Grade 11 4.7.3 Construct the simple parallel clipper circuit in FIGURE 4.7.7 below on the breadboard in FIGURE 4.7.8 below. Draw the component layout on the figure. FIGURE 4.7.7 FIGURE 4.7.8 (4) Connect the circuit to the function generator (as the input) and to the oscilloscope (as the output) only after it has been checked and approved by the teacher. Sketch the input and the output waveforms on the display in FIGURE4.7.9 below. FIGURE 4.7.9 (4) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 36 DBE/PAT 2017 NSC – Grade 11 4.7.4 Construct the parallel biased clipper circuit in FIGURE 4.7.10 below on the breadboard in FIGURE 4.7.11 below. Draw the component layout on the figure. FIGURE 4.7.10 FIGURE 4.7.11 (4) Connect the circuit to the function generator (as the input) and to the oscilloscope (as the output) only after it has been checked and approved by the teacher. Sketch the input and the output waveforms on the display in FIGURE 4.7.12 below. FIGURE 4.7.12 (4) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 37 DBE/PAT 2017 NSC – Grade 11 4.7.5 Construct the simple clamper circuit in FIGURE 4.7.13 on the breadboard in FIGURE 4.7.14 below. Draw the component layout on the figure. FIGURE 4.7.13 FIGURE 4.7.14 (4) Connect the circuit to the function generator (as the input) and to the oscilloscope (as the output) only after it has been checked and approved by the teacher. Sketch the input and the output waveforms on the display in FIGURE 3.7.9 below. FIGURE 4.7.15 (4) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 38 DBE/PAT 2017 NSC – Grade 11 4.7.6 Construct the integrator circuit in FIGURE 4.7.16 below on the breadboard in FIGURE 4.7.17 below. Draw the component layout on the figure. FIGURE 4.7.16 FIGURE 4.7.17 (4) Connect the circuit to the function generator (as the input) and to the oscilloscope (as the output) only after it has been checked and approved by the teacher. Sketch the input and the output waveforms on the display in FIGURE4.7.18 below. FIGURE 4.7.18 (4) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 39 DBE/PAT 2017 NSC – Grade 11 4.8 Simulation 8: Electronics and digital electronics Name of learner: …………………………………………... Grade: ………... Date: …………… Practical: The astable multivibrator Resources: Oscilloscope Variable DC supply 0–12 V Breadboard Connecting leads/probes C1 & C2 10 µF C1 & C2 1 µF R1 & R4 1 kΩ R2 & R3 15 kΩ Instructions: 4.8.1 Construct the circuit shown below on the breadboard supplied. Set the supply voltage between 0 V and 12 V. VCC 6 V R1 R2 R3 R4 C1 C2 Output 1 Output 2 Q Q c c b b TR 1 TR 2 e e NPN NPN 0V C1 = C2 R1 = R2 Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 40 DBE/PAT 2017 NSC – Grade 11 BREADBOARD W W X X A A B B C C D D E E F F G G H H I I J J Y Y Z Z (a) Construction of the circuit. (10) Task Mark Allocation (Tick the appropriate level next to the task description) Description 1 2 3 4 5 Not achieved Not competent Competent Highly Outstanding yet Competent Breadboard The learner The learner The learner The learner The learner planning was unable to was able identify was able to plan was able to plan was able to plan and layout plan the board the correct and place the 3 successfully and successfully and layout using the components and components place all the place all the circuit diagram meters. correctly on the components components provided. breadboard. correctly on the correctly on the breadboard with breadboard links. connected to the function generator. Trouble- The learner's The circuit was The circuit was The circuit was The circuit was shooting circuit was not complete, but not complete and the complete and the complete and the complete and functional. The learner was able learner was able learner was able she/he was learner was to identify and to identify and to identify and unable to conduct unable to identify rectify 1 mistake. rectify 2 rectify all the trouble-shooting. the problem. mistakes. mistakes. Facet Sheet: (10) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 41 DBE/PAT 2017 NSC – Grade 11 (b) Observe and draw the two output waveforms. (4) (c) Replace the 1 µF capacitors with the 10 µF capacitors. Observe and draw the two output waveforms. Two marks for correct replacement of the components. (6) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 42 DBE/PAT 2017 NSC – Grade 11 Construct the circuit shown below on the breadboard supplied. Caution must be taken when the circuit is connected to the 220 V supply. Load R2 R4 TRIAC POT VS 220 V R1 50 Hz R3 C1 C2 DIAC C3 (10) BREADBOARD W W X X A A B B C C D D E E F F G G H H I I J J Y Y Z Z Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 43 DBE/PAT 2017 NSC – Grade 11 Task Mark Allocation (Tick the appropriate level next to the task description) Description 1 2 3 4 5 Not achieved Not competent Competent Highly Outstanding yet Competent Breadboard The learner The learner The learner The learner The learner planning was unable to was able identify was able to plan was able to plan was able to plan and layout plan the board the correct and place the successfully and successfully and layout using the components and 3 components place all the place all the circuit diagram meters. correctly on the components components provided. breadboard. correctly on the correctly on the breadboard with breadboard links. connected to the function generator. Trouble- The learner's The circuit was The circuit was The circuit was The circuit was shooting circuit was not complete, but not complete and the complete and the complete and the complete and functional. The learner was able learner was able learner was able she/he was learner was to identify and to identify and to identify and unable to conduct unable to identify rectify 1 mistake. rectify 2 rectify all the trouble-shooting. the problem. mistakes. mistakes. Facet Sheet: (10) (a) On completion of the circuit, insert a globe and adjust the potentiometer. The lamp should change brightness. Correct operation = 5. (5) (b) Explain why the lamp changes brightness when the potentiometer's value is changed. (5) [40] Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 44 DBE/PAT 2017 NSC – Grade 11 5. SECTION B: DESIGN AND MAKE Design and Make Project Time: January–August 2017 Learner Name: School: Class: Title/Type of Project: INSTRUCTIONS: • This section is COMPULSORY for all learners. • The teacher will choose a circuit for the project. • In Grade 11 power supply is the suggested project for 2017. • Any project constructed must include at least (but is not limited to): o No fewer than 7 components o A variety of components (both active and passive) should be used o PCB making in some form o Soldering o An enclosure with a switch and protection • The checklist below must be used to ensure that all the required tasks for the PAT have been completed. PAT Checklist No. Description Tick () No Yes Design and Make: Part 1 1 Circuit diagram drawn   2 Circuit description filled in   3 Component list completed   4 Tools list for circuitry populated   5 Measuring instrument list completed   6 Evidence of prototyping printed and pasted into the file   7 Learner's own Vero-board/PCB planning/design printed and included in file   Design and Make: Part 2 1 Enclosure design completed and included in the file   2 Unique name written down and included on the enclosure   3 Logo designed and included on the enclosure   Miscellaneous 1 Enclosure included in the project   2 Enclosure prepared and drilled according to the design   3 Enclosure finished off and completed with name and logo   4 PCB securely mounted in the enclosure using acceptable techniques   5 Circuit inside the enclosure is accessible   6 Internal wiring neat and ready for inspection   7 File and project completed and ready for moderation in the workshop/room   Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 45 DBE/PAT 2017 NSC – Grade 11 5.1 Design and Make: PART 1 5.1.1 Circuit diagram Draw the circuit diagram of your project. 5.1.2 Project: Description of operation Use the space provided below to give an overview of how your project functions. Use your own words and do some research of your own. Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 46 DBE/PAT 2017 NSC – Grade 11 5.1.3 Component list Draw up a list of components you will need according to the circuit diagram. LABEL DESCRIPTION AND VALUE QUANTITY 5.1.4 Tool/Instrument list Draw up a list of tools you will need to complete the PAT circuitry. You may add to the list as you proceed through the PAT. DESCRIPTION PURPOSE/USE 5.1.5 Evidence of prototyping Take photographs of the working circuit on the breadboard using a digital camera or a cellphone and insert below. Add your name on the photographs. Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 47 DBE/PAT 2017 NSC – Grade 11 5.1.6 Vero-board planning/PCB design Design a Vero-board OR PCB design for the circuit you are going to build. Do EITHER the one OR the other – NOT both! Place your design below! Final design: Vero-board (same size and placement of components) Use an X to show breaks made on the track Printed Circuit Board Planning Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 48 DBE/PAT 2017 NSC – Grade 11 5.2 Assessment of the design-and-make phase: Part 1 Achieved  Mark Not Achieved  No. Facet Description Circuit Diagram 1 Circuit diagram was drawn using EGD equipment 1 2 Circuit diagram was drawn with EGD equipment and CAD 1 3 Circuit diagram was drawn using correct symbols 1 4 Circuit diagram has all the labels – R1, C1, Tr1, etc. 1 5 Circuit diagram has all the component values –100 Ω, 220 μF, etc. 1 6 Circuit diagram has a name 1 7 Circuit diagram has a frame and title block (EGD approach) 1 Component List 8 Labels correlate with circuit diagram 1 9 Description and values correlate with circuit diagram 1 10 Quantities are correct 1 Description of Operation 11 Basic function of the circuit is described correctly 1 12 All components in the circuit diagram and component list are 1 included in the description 13 Purpose of all components in the circuit diagram and component 1 list is described correctly. 14 Learner used own interpretation and did not copy from another 1 source verbatim 15 Sources are acknowledged 1 Tool/Instrument List 16 The tool/instrument list is completed 1 17 The tools/instruments listed all have a purpose for being used 1 Evidence of Prototyping on Breadboard 18 Unique original photographs of the prototyping are included 1 − Photos must not match any other learner's 19 Unique original photographs include the learner's name 1 20 Photographs are clear and in focus 1 − All components are clearly identifiable 21 Prototype is operational 2 − No photograph – no mark 22 Video of working prototype is available for confirmation 3 Vero-board Planning/PCB Design 23 Board design is included in the PAT file 1 24 Component overlay showing placement is included 1 25 Components are labelled the same as in the circuit diagram 1 26 Colour is used in the PCB Design 1 27 The design is original and does not match any other learner's 1 design 28 Board layout (tracks/current flow) is functional and matches the 1 original circuit diagram Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 49 DBE/PAT 2017 NSC – Grade 11 Circuit Board Manufacturing 29 Circuit board is etched neatly according to the 5 PCB design 30 The PCB is tinned neatly (not with solder) 1 31 The soldered PCB solder side is covered with 1 a clear protective coating (Plastik 70/clear lacquer) 32 Holes are drilled neatly and are aligned in the 1 middle of the PADS on the PCB 33 Mounting holes of the PCB are drilled 1 symmetrically 34 All burrs are removed 1 35 The PCB is cut neatly/squarely and edges are 1 filed neatly 36 Axial and radial components are placed neatly 1 and flush with the board 37 Component orientation is aligned between 1 similar components, e.g. the gold band of all resistors is placed on the same side 38 Soldered components – leads are cut off flush 2 and neat on the solder side 39 More than 60% of solder joints are shiny (no 2 dry joints) 40 Wire insulation is stripped to the correct length 2 (no extra copper showing) 41 Wiring is long enough to allow for dismantling 1 and inspection 42 Wiring is wrapped neatly 1 43 A power switch is included and fitted to the 2 enclosure 44 A fuse/protection is included and fitted 2 correctly 45 Wiring entering/exiting the enclosure is 2 provided with a grommet/applicable fittings/sockets 46 Batteries are mounted using a battery 1 housing/mounting bracket and battery clip (no double-sided tape) 47 The project has a pilot light/LED installed in 1 the enclosure showing when the circuit is operational (switch is on – must go out when fuse is blown) 48 The project is fully operational and 10 commissioned/installed in the enclosure TOTAL (PART 1 = 70 marks) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 50 DBE/PAT 2017 NSC – Grade 11 5.3 Design and Make: Part 2 5.3.1 Enclosure design • Design an enclosure for your project. • NO FREEHAND DRAWINGS! • Draw using EGD equipment or use a CAD program. • Draw in first-angle orthographic projection. Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 51 DBE/PAT 2017 NSC – Grade 11 5.3.2 Manufacture the enclosure neatly according to your design. 5.3.3 Choose a name for your device. Write down the name of the device below. 5.3.4 Design a unique logo for your device below. Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 52 DBE/PAT 2017 NSC – Grade 11 5.4 Assessment of the Design-and-Make Phase: PART 2 A c h i e v e d  N o t A c h i e v e d Mark No. Facet Description  Enclosure Design 49 Enclosure design includes a first-angle orthographic projection 1 50 Drawn design includes a title box and page border 1 51 Isometric drawing included additionally 1 52 Design drawn using EGD equipment 1 53 Design done in BOTH CAD and EGD 1 54 Design includes colour 1 55 Dimensions included 1 56 Name of the device is written in the PAT document 1 57 The logo design is in the PAT document 1 58 The logo design contains colour in the PAT document 1 Subtotal (10/2 = 5 marks maximum) Enclosure Manufacturing 59 Enclosure matches the design 1 − Dimensions and placement correlates 60 Name of the device is on the enclosure 1 61 The logo design is on the enclosure 1 62 The logo design contains colour on the enclosure 1 63 The logo design on the enclosure is durable and not merely a piece 1 of paper pasted onto the enclosure (painted/decoupage/ screen-printed/sublimation-printed) 64 The enclosure is manufactured from scratch 4 − Does not include: Injection moulded plastic boxes, card board, paper, margarine tubs and recycled enclosures − Does include: Sheet metal, Perspex/plexi-glass/wood/glass and other raw materials Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 53 DBE/PAT 2017 NSC – Grade 11 65 Holes/Cut-outs in the enclosure are made with the appropriate tools 2 66 Specification plate with learner name, operating voltage, fuse rating 1 and additional information on the project 67 Enclosure is neatly prepared, painted and aesthetically pleasing 2 68 The circuit board is mounted using appropriate methods inside the 1 enclosure (NO DOUBLE-SIDED TAPE, Prestik, glue, chewing gum, masking tape) Subtotal (15 marks maximum) TOTAL (PART 2) 20 marks Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 54 DBE/PAT 2017 NSC 6. PROJECTS 6.1 Traffic Light 6.1.1 Component List 100 kΩ resistor 220 Ω resistor x 3 22 kΩ resistor x1 LED green x 1 LED yellow x 1 LED red x 1 1 µ F capacitor x 2 10 µF capacitor x 1 470 kΩ variable resistor x 1 IC NE555 IC CD4017 1N4007 diode x 6 PCB 150 x 100 mm 6.1.2 Circuit Diagram Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 55 DBE/PAT 2017 NSC – Grade 11 6.2 Regulated Power Supply 6.2.1 Component List 1N4001 diode Bridge rectifier 2 200 µF/63 V electrolytic capacitor LM317 adjustable regulator 0,1 µF ceramic capacitor Voltmeter 1 µF/40 V capacitor Transformer 220 V/24 V 3-wire plug and cord 1 K 8 resistor On/Off toggle switch 220 Ω resistor 220 V, 500 mA slow-blow fuse, fuse holder 27 K resistor Knob 5 K potentiometer Red and black banana jacks (4 mm) 10 K trim-pot Red and black banana jacks (4 mm) 6.2.2 Circuit Diagram Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology 56 DBE/PAT 2017 NSC 6.3 Radio Transmitter 6.3.1 Component list BC 547 NPN transistor Electret microphone 47 kΩ 1 nF non-polarised capacitor 10 pF non-polarised capacitor x 2 4,7 pF non-polarised capacitor 330 Ω 22 kΩ 1µF electrolytic capacitor 22 nF non-polarised capacitor Coil (4 turns on F29 slug 3 mm diameter 0,5 mm wire) 6.3 Circuit Diagram Copyright reserved