Electrical Technology PAT GR 12 2020 (Digital) Eng

Downloaded from hlayiso.com ELECTRICAL TECHNOLOGY (DIGITAL ELECTRONICS) GUIDELINES FOR PRACTICAL ASSESSMENT TASKS GRADE 12 2020 These guidelines consist of 50 pages. Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 2 DBE/PAT 2020 NSC TABLE OF CONTENT PAGE 1. INTRODUCTION/BACKGROUND 3 2. TEACHER GUIDELINES 4 2.1 How to administer PAT 4 2.2 How to mark/assess PAT 4 2.3 PAT Assessment Management Plan 5 2.4 Moderation of PATs 6 2.5 Consequences of absence/non-submission of tasks 6 2.6 Simulations 7 2.7 Projects 7 2.8 Working Mark Sheet 8 3. LEARNER GUIDELINES 9 3.1 Instructions to Learners 10 3.2 Declaration of Authenticity 10 4. SIMULATIONS 11 4.1 Simulation 1: 741 op-amp and 555 IC 11 4.2 Simulation 2: 741 op-amp Schmitt trigger and summing amplifier circuit 16 4.3 Simulation 3: 741 bi-stable multivibrator 21 4.4 Simulation 4: Connect a 7-segment display to a 4-bit BCD 7-segment driver 30 4.5 Simulation 5: RS latch and PICAXE flow diagram 34 5. SECTION B: DESIGN AND MAKE 38 5.1 Design and make: Part 1 39 5.2 Assessment of the design and make phase: Part 1 41 5.3 Design and make: Part 2 43 5.4 Assessment of design and make phase: Part 2 44 6. PROJECTS 6.1 Practical project (Electronics): Traffic light 45 6.2 Practical project (Digital Electronics): Cellphone detector 46 6.3 Programmable buggy 48 7. CONCLUSION 50 Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 3 DBE/PAT 2020 NSC 1. INTRODUCTION The 17 Curriculum and Assessment Policy Statements subjects which contain a practical component all include a practical assessment task (PAT). These subjects are:  AGRICULTURE: Agricultural Management Practices, Agricultural Technology  ARTS: Dance Studies, Design, Dramatic Arts, Music, Visual Arts  SCIENCES: Computer Applications Technology, Information Technology, Technical Sciences  SERVICES: Consumer Studies, Hospitality Studies, Tourism  TECHNOLOGY: Civil Technology, Electrical Technology, Mechanical Technology and Engineering Graphics and Design A practical assessment task (PAT) mark is a compulsory component of the final promotion mark for all candidates offering subjects that have a practical component and counts 25% (100 marks) of the end-of-the-year examination mark. The PAT is implemented across the first three terms of the school year. This is broken down into different phases or a series of smaller activities that make up the PAT. The PAT allows for learners to be assessed on a regular basis during the school year and it also allows for the assessment of skills that cannot be assessed in a written format, e.g. test or examination. It is therefore important that schools ensure that all learners complete the practical assessment tasks within the stipulated period to ensure that learners are resulted at the end of the school year. The planning and execution of the PAT differs from subject to subject. Practical assessment tasks are designed to develop and demonstrate a learner's ability to integrate a variety of skills in order to solve a problem. The PAT also makes use of a technological process to inform the learner what steps needs to be followed to derive a solution for the problem. The PAT consists of four or more simulations and a practical project. The teacher may choose any one of the practical projects and any four simulations available for power systems. The teacher must apply assessment on an ongoing basis at the same time that the learner is developing the required skills. Four simulations should be completed by the learners, in addition to the manufacturing of a practical project. The PAT incorporates all the skills the learner has developed throughout the year. The PAT ensures that all the different skills will be acquired by learners on completion of practical work, as well as the correct use of tools and instruments. Requirements for Presentation A learner must present the following:  PAT file with all the evidence of simulations, design and prototyping. A copy of the PAT 2020 cover page. The relevant simulations and assessment sheets should be copied and handed to each learner to include in the file.  Practical project with: o Enclosure:  The file must include a design.  The enclosure and the design must match.  No cardboard boxes are allowed.  Plastic and metal enclosures are acceptable.  The enclosure should be accessible for scrutiny inside.  Lids that are secured with screws are preferred. Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 4 DBE/PAT 2020 NSC o Circuit board:  The file should include the PCB design.  The PCB must be mounted inside the enclosure in such a manner that it can be removed for scrutiny.  Switches, potentiometers, connectors and other items must be mounted.  Wiring must be neat and bound/wrapped.  Wiring must be long enough to allow for the PCB to be removed and inspected with ease. o Logo and name:  The file should contain the logo and name design.  Logo and name must be prominent on the enclosure. The PAT will have a financial impact on the school's budget and school management teams are required to make provision to accommodate this particular expense. PAT components and other items must be acquired timeously, for use by the learners, before the end of the first term at the start of the academic year. It is the responsibility of the HOD to ensure that the teacher is progressing with the PAT from the start of the school year. Provincial departments are responsible for setting up moderation timetables and consequently PATs should be completed in time for moderation. 2. TEACHER GUIDELINES 2.1 How to Administer PATs Teachers must ensure that learners complete the simulations required for each term. The project should be started in January in order to ensure its completion by August. In instances where formal assessments take place, the teacher has to assume the responsibility thereof. The PAT should be completed during the first three terms and must be ready at the start of PAT moderation. Teachers must make copies of the relevant simulations and hand it to learners at the beginning of each term. The PAT must not be allowed to leave the workshop and must be kept in a safe place at all times when learners are not working on it. The weightings of the PAT must be adhered to and teachers are not allowed to change weightings for the different sections. 2.2 How to Mark/Assess the PATs The PAT for Grade 12 will be set and assessed internally, but moderated externally. All formal assessment will be done by the teacher. The teacher is required to produce a working model and model answer file that sets the baseline for assessment at a Highly Competent Level for every project choice exercised by the learners. This file must include all the simulations with answers the teacher has done him/herself. The teacher will use the model answers and project to assess the simulations and projects of the learners. Once a facet sheet has been completed by the teacher, assessment will be deemed to be complete. No re-assessment will be done once the facet sheets have been completed and captured by the teacher. Learners must ensure that the work is done to the required standard before the teacher finally assesses the PAT during each stage of completion. Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 5 DBE/PAT 2020 NSC 2.3 PAT Assessment Management Plan The assessment plan for the PAT is as follows: TIME FRAME ACTIVITY RESPONSIBILITY Preparation for Teacher – Builds the models and works out the model answers for PAT 2020 the simulations for 2020. Identifies shortages in tools, equipment and consumable items for simulations that must be procured in 2020 SMT – Receives procurement requests from teachers and processes payments for the acquisition of required items January–March Simulations 1 Teacher – Copies and hands out simulations 2020 and 2 Learners – Complete simulations Teacher – Assesses simulations HOD – Checks if tasks have been completed and marked by the teacher before the holiday January 2020 PAT project – Teacher – Obtains quotations for PAT projects procurement Principal – Approves PAT procurement for PAT projects Teacher – Ensures that PAT projects are ordered and delivered HOD – Checks in on teacher to see if the process is adhered to February 2020 PAT project – Teacher – Ensures that there is secure storage for PAT projects learners Teacher – Hands out and takes in PAT projects commence with Teacher – Includes practical sessions for learners to complete the project PAT project every week Learners – Commence with completion of the PAT project HOD – Checks in on teacher to ensure that practical workshop sessions take place on a weekly basis April–June Moderation of District subject facilitator/subject specialist will visit the school and 2020 Simulations 1 moderate Simulation 1 and 2 and 2 10% of learners' work is moderated April–June Simulations 3 Teacher – Copies and hands out simulations 2020 and 4 Learners – Complete simulations Teacher – Assesses simulations HOD – Checks if tasks have been completed and marked by the teacher before the holiday April–June PAT project – Teacher – Ensures that there is secure storage for PAT projects 2020 learners Teacher – Hands out and takes in PAT projects continue with Teacher – Includes practical sessions for learners to complete the project PAT project every week Learners – Continue with completion of the PAT project HOD – Checks in on teacher to ensure that practical workshop sessions take place on a weekly basis July holidays PAT Learners that are behind on the PAT are required to complete the 2020 intervention project during this holiday. July–August Moderation of District subject facilitator/subject specialist will visit the school and 2020 Simulations 3 moderate Simulations 3 and 4 – different learners from the previous and 4 term 10% of learners' work is moderated July–August PAT project – Teacher – Ensures that there is secure storage for PAT projects 2020 completion Teacher – Hands out and takes in PAT projects Teacher – Completes the PAT project with learners and compiles the PAT file Learners – Complete the PAT project and file HOD – Checks to see that 100% of the PAT files and projects are completed and assessed September– PAT PAT projects are moderated by subject facilitators/subject October 2020 moderation specialists from the province and learners are available to demonstrate skills 10% of learners are moderated randomly Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 6 DBE/PAT 2020 NSC 2.4 Moderation of PATs Provincial moderation of each term's simulations will start as early as the following term. Simulations 1 and 2 should be moderated as soon as the second term starts. Similarly, Simulations 3 and 4 will be moderated in July. The project will, however, only be moderated on completion. During moderation of the PAT the learner's file and project must be presented to the moderator. The moderation process is as follows:  During moderation, learners are randomly selected to demonstrate the different simulations. All four simulations will be moderated.  The teacher is required to build an exemplar model for each project type chosen for the school.  This model must be on display during moderation.  The teacher's model forms the standard of the moderation at Level 4 (Highly Competent).  Level 5 assessments must exceed the model of the teacher in skill and finishing.  Learners who are moderated will have access to their files during moderation and may refer to the simulations they completed earlier in the year.  Learners may NOT ask assistance from other learners during moderation.  All projects and files must be on display for the moderator.  If a learner is unable to repeat the simulation or cannot produce a working circuit during moderation, marks will be deducted and circuits assessed as not being operational.  The moderator will randomly select no fewer than two projects (not simulations) and the learners involved will have to explain how the project was manufactured.  Where required, the moderator should be able to call on the learner to explain the function and principles of operation, and request the learner to exhibit the skills acquired through the simulations for moderation purposes.  On completion the moderator will, if needed, adjust the marks of the group upwards or downwards, depending on the outcome of moderation.  Normal examination protocols for appeals will be adhered to, if a dispute arises from adjustments made. 2.5 Absence/Non-submission of Tasks The absence of a PAT mark in Electrical Technology without a valid reason: The learner will be given three weeks before the commencement of the final end-of-year examination to submit outstanding task. Should the learner fail to fulfil the outstanding PAT requirement, such a learner will be awarded a zero (0) for that PAT component. Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 7 DBE/PAT 2020 NSC 2.6 Simulations Simulations are circuits, experiments and tests/tasks which the learner will have to build, test and measure and practically do as part of the development of practical skills. These skills have to be illustrated to the external moderator that visits the school at intervals during the school year. Teachers who make use of simulation programs on a computer may use it for the learners to practice on. However, it is required that the circuit be built using real components and that measurements be made with actual instruments for the purposes of assessment and moderation. The correct procedure for completing simulations is outlined below for teachers and school management teams who are responsible for the implementation of the PAT in Electrical Technology. STEP 1: The teacher will choose simulations from the provided examples. STEP 2: Compile a list of the components needed for every simulation. Add extra components as these items are very small and you will need extras, as these items get lost/damaged very easily when learners are working with it. STEP 3: Contact three different electronics component suppliers for comparative quotations. STEP 4: Submit the quotations to the SMT for approval and procurement of the items. STEP 5: Place the components in storage. Collate items for each simulation, thus making it easier to distribute and use during practical sessions. Ensure that different values of components do not mix, as this would lead to components being used incorrectly and this could damage the component and in extreme cases, the equipment used. STEP 6: Copy the relevant simulations and hand them out to learners at the start of the term. Teachers are allowed to adjust circuits and component values to suit their environment/ resource availability. Teachers are required to develop a set of model answers in the teacher's file. Moderators will use the teacher's model answers and artefacts when moderating. 2.7 Projects The projects are construction projects teachers can choose for their learners. These projects are based on proven circuits provided from schools and subject advisors. The projects are based on working prototypes and require careful construction in order for it to operate correctly. Projects are varied in cost and teachers must ensure that the projects chosen fall within the scope of the school's budget. Once the teacher has decided on a circuit, he/she must construct the prototype. Thereafter, copies of the provided circuit can be made and distributed to learners. They MUST redraw these circuits in their file correctly. The description of the operation of the circuits is NOT complete. It is required of learners to interrogate the function of the components in the provided circuit. They should elaborate on the purpose of components in the circuit. It is recommended that those learners investigate similar circuits available on the internet and in the school library or workshop reference books. Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 8 DBE/PAT 2020 NSC 2.8 Working Mark sheet (A working Excel file is provided with this PAT) PAT Mark Sheet Term 1 Term 2 Project Total = Mark out of 100 Moderated Mark Term1 + Term 2 + Design Design Project Simulation Simulation Simulation Simulation and and 1 2 3 4 Make Make 250 Part 1 Part 2 No. Name of Learner 40 40 40 40 70 20 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Total Average Teacher Name: Principal Name: Moderator Name: Signature: Signature: Signature: School Stamp Date: Date:_______________________ Date:__________________ Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 9 DBE/PAT 2020 NSC 3. LEARNER GUIDELINES PAT 2020 cover page (Place this page at the front of the PAT.) Department of Basic Education Grade 12 CAPS for Technical High Schools Practical Assessment Task – Electrical Technology Time allowed: Terms 1–3 (2020) Learner Name: Class: School: Specialisation: DIGITAL ELECTRONICS Complete FOUR simulations. Project (Write the name of the project): _____________________________ Evidence of moderation: NOTE: When the learner evidence (LE) selected has been moderated at school level, the table will contain evidence of moderation. Provincial moderators will sign the provincial moderation and only sign if re-moderation is needed. Moderation Signature Date Signature Date School-based Provincial moderation Re-moderation Mark allocation Moderated PAT Component Maximum Mark Learner Mark Mark Simulation 1 40 Simulation 2 40 Simulation 3 40 Simulation 4 40 Design and Make Project – Circuit 70 Design and Make Project – Enclosure 20 Total 250 Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 10 DBE/PAT 2020 NSC 3.1 Instructions to learner  The practical assessment task counts 25% of your final promotion mark.  All work produced by you must be your own effort. Group work and co-operative work is not allowed.  The practical assessment task must be completed over three quarters.  The PAT file must contain 4 simulations and a practical project.  Calculations should be clear and include units. Calculations should be rounded off to TWO digits. SI units should be used.  Circuit diagrams can be hand-drawn or drawn on CAD. No photocopies or scanned files are allowed.  Photos are allowed and can be in colour or greyscale. Scanned photos and photocopies are allowed.  This document must be placed inside your PAT file together with the other evidence.  Learners with identical photos will be penalised and receive zero for that section 3.2 Declaration of Authenticity (COMPULSORY) Declaration: I herewith declare that the work represented in this evidence is entirely my own effort. I understand that if proven otherwise, my final results may be withheld. Signature of learner Date Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 11 DBE/PAT 2020 NSC 4. SIMULATIONS 4.1 Simulation 1: 741 Op-Amp and 555 IC Name of learner: Mark Class: Date Completed: 40 Date Assessed: Assessor Signature: Date Moderated: Moderator Signature: PURPOSE: Construct a simple circuit using the 741 op-amp to build a non-inverting amplifier and display the input/output waveforms on an oscilloscope Activity 1A: Construct a circuit using the 741 op-amp. REQUIRED RESOURCES: TOOLS/INSTRUMENTS MATERIALS Analogue/Digital trainer 1 x LM741 IC Analogue/Digital oscilloscope 1 x 1 KΩ resistor Function generator 1 x 10 KΩ resistor Variable DC power supply Connecting wires Side cutters Wire stripper Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 12 DBE/PAT 2020 NSC PROCEDURE: 1. Construct the circuit as in FIGURE 1.1 on the breadboard. Learner was able to Learner was able to Learner was able to construct construct a minimum part construct a part of the the circuit correctly without of the circuit correctly circuit correctly without assistance without assistance assistance 1 3 4 (4) R2 1K 7 3 5 6 LM741 2 1 1V – 1KHz 4 R3 RL 100E 10K Rf 10K R1 1K FIGURE 1.1 2. Connect the function generator between ground and Vin. (1) 3. Connect channel 1 to the input and channel 2 to the output. 4. Set the function generator to give a sine wave output. (1) 5. Adjust the function generator to 1 000 Hz (1 kHz) at a voltage of 1 V peak. (1) 6. Switch on the power to the circuit and observe the input and output waveforms. 7. Draw the input and output waveforms. Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 13 DBE/PAT 2020 NSC INPUT WAVEFORM (3) OUTPUT WAVEFORM (3) QUESTIONS 1. Calculate the gain of the amplifier with the given resistor values. (3) 2. State how the gain of the amplifier will be affected if the feedback resistor is halved. (2) Learner did not do any Learner did housekeeping Learner did housekeeping housekeeping duties after being reminded without being reminded 1 2 3 (3) Subtotal – Activity 1A [21] Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 14 DBE/PAT 2020 NSC Activity 1B: Construct a clock pulse circuit using the 555 IC PURPOSE Construct a simple circuit using the 555 IC to build a clock pulse generator (astable multivibrator) and display the output waveforms on an oscilloscope. REQUIRED RESOURCES TOOLS/INSTRUMENTS MATERIALS Analogue/Digital trainer 1 x 555 timer IC Analogue/Digital oscilloscope 1 x 220 Ω resistor Function generator 1 x LED Variable DC power supply 1 x 10 KΩ resistor Side cutters 1 x 100 KΩ pre-set POT Wire stripper 1 x 10 µF (electrolytic capacitor 16 V) Connecting wires PROCEDURE 1. Construct the circuit, as in FIGURE 1.2, on the breadboard. Learner was able to Learner was able to Learner was able to construct a minimum part construct a part of the construct the circuit of the circuit correctly circuit correctly without correctly without without assistance assistance assistance 1 3 4 (4) +9V R1 10K 8 4 7 V+ RST DISCHARGE VR1 3 6 100K THR 555 OUT 2 TRIGGER GND 1 5 R2 470E SCOPE SCOPE CH2 CH1 C1 D 10µF SCOPE CH1 -9V FIGURE 1.2 Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 15 DBE/PAT 2020 NSC 2. Connect channel 2 of the oscilloscope to the output. 3. Switch the power on to the circuit and observe the output waveform on the oscilloscope as well as the LED. 4. Draw the output waveforms observed on the oscilloscope on the grid provided. OUTPUT WAVEFORM (3) QUESTIONS 1. List the components responsible for the frequency of the output. (3) 2. Calculate the charging time for the circuit using the given components. (3) 1 2 3 Learner did not do any Learner did housekeeping Learner did housekeeping housekeeping duties after being reminded without being reminded The learner failed to get The learner was able to set The learner was able to set the output wave on the the oscilloscope and the oscilloscope and oscilloscope managed to get the output managed to get the output wave after the assistance wave without the from the teacher assistance of the teacher (6) [19] Subtotal: Activity 1A (21) Subtotal: Activity 1B (19) Total: Simulation 1 (40) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 16 DBE/PAT 2020 NSC 4.2 Simulation 2: 741 op-amp Schmidt trigger and summing amplifier circuit Name of learner: Mark: Class: Date completed: 40 Date assessed: Assessor signature: Date moderated: Moderator signature: PURPOSE Construct a simple circuit using the using a 741 op-amp to build a Schmidt trigger circuit and a summing amplifier circuit and display output waveforms on an oscilloscope. Activity 2A: Construct a Schmidt trigger circuit using the 741 op-amp. REQUIRED RESOURCES TOOLS/INSTRUMENTS MATERIALS Analogue/Digital trainer 1 x LM741 op-amp Analogue/Digital oscilloscope 2 x 10 KΩ resistors Function generator 3 x 1 k resistor Variable DC power supply 1 x 2k2  resistor (pre-set POT) Side cutters 1 x 100 k resistor Wire stripper 1 x 1M 1 x LED Connecting wires Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 17 DBE/PAT 2020 NSC PROCEDURE 1. Construct the circuit, as in FIGURE 3.1, on the breadboard. Learner was able to Learner was able to Learner was able to construct a minimum part construct a part of the construct the circuit of the circuit correctly circuit correctly without correctly without without assistance assistance assistance 1 3 4 (4) +9V Note that the scope R1 1K must be set to DC. VR1 2 7 - 2K2 6 741 3 + CH 2 4 R3 470E R2 1K -9V Rf 100K D1 R Hysteresis CH 1 Resistor FIGURE 3.1 2. Adjust the potentiometer, while observing the output voltage. The output switches to a HIGH when Vin is ________V and to low when Vin is________V. The hysteresis is _______V. (3) 3. Replace the 100k resistor with 10 k. Adjust the input potentiometer slowly. 4. While watching the LED on the output, can you change the output of the comparator to adjust the brightness of the LED? _________. (1) The output now switches to high when input voltage is ______V and (1) to low at ________V. The hysteresis is ________V. (2) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 18 DBE/PAT 2020 NSC 5. Replace the hysteresis resistor with 1 M. The output now switches to a HIGH at _________V and to a LOW at _____ V. (2) The hysteresis is ________V. (1) Remove the hysteresis resistor and adjust the potentiometer slowly 6. CONCLUSION: (3) Learner did not do any Learner did housekeeping Learner did housekeeping housekeeping duties after being reminded without being reminded 1 2 4 (4) [21] Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 19 DBE/PAT 2020 NSC ACTIVITY 2B: Constructing a summing amplifier circuit using the 741 op amp REQUIRED RESOURCES TOOLS/INSTRUMENTS MATERIALS Analogue/Digital trainer 6 x 1k  resistors Analogue/Digital oscilloscope 4 x 10 k resistors Function generator 1 x 2k7  resistor Variable DC power supply 3 x 2k2  variable POTs Wire-stripper 1 x LM 741 IC Side cutters Connecting wires PROCEDURE 1. Construct the circuit, as in FIGURE 3.2, on the breadboard. Learner was able to Learner was able to Learner was able to construct a minimum part construct a part of the construct the circuit of the circuit correctly circuit correctly without correctly without without assistance assistance assistance 2 3 5 (5) +9V R1 R2 R2 1K 1K 1K R7 VR3 2K2 10K R8 R10 VR2 2K2 10K 10K R9 VR1 2 7 2K2 - 10K 741 6 3 + 4 R2 R4 R6 1K 1K 1K Rf -9V R3 V 470E 100K Hysteresis Resistor R FIGURE 3.2 Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 20 DBE/PAT 2020 NSC 2. Use the 2k2  POTs to set V1, V2 and V3 to the voltages as indicated in the table below. Measure the output values and populate the table below. 3. Vout V1 + V2 + V3 = 3 + 2.5 + 1.75 = 1.5 + -4 + 2.2 = 5 + -4.5 + 1 = -4 + 1.5 + 2.5 = -1.5 + -2.25 + -3.25 = (5) 4 CONCLUSION: (5) Learner did not do any Learner did housekeeping Learner did housekeeping housekeeping duties after being reminded without being reminded 1 2 4 (4) [19] Subtotal: Activity 2A (21) Subtotal: Activity 2B (19) Total: Simulation 2 [40] Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 21 DBE/PAT 2020 NSC 4.3 Simulation 3: 741 bi-stable multivibrator Name of learner: Mark: Class: Date completed: 40 Date assessed: Assessor signature: Date moderated: Moderator signature: PURPOSE  To study the 741 bi-stable multivibrator as a practical circuit.  To build a bi-stable multivibrator with the 741 op-amp.  To compare the theory learned in class with the actual circuit. RESOURCES TOOLS/INSTRUMENTS MATERIALS Experiment board 1 x 741 op-amp dip8 Voltmeter 1 x 560 Ω resistor Dual power supply 9 V 0–9 V 3 x 1 kΩ resistors Side cutters 2 x 470 Ω resistors Long-nose pliers 1 x 10 µF capacitor Wire stripper 1 x red LED 1 x green LED 2 x push button/tactile switches Connecting wires PROCEDURE 1. Build the circuit diagram in FIGURE 3.1 on your experiment board. After you switch on the circuit press switch (SW1). Connect channel 1 of the oscilloscope to pin2 of the 741 IC. Connect channel 2 of the oscilloscope to pin 6 of the 741 IC. Set the T/div setting to 1s/div and answer the questions that follow. Take note of the polarity of the input pulses, output signal and which LED is ON. +9 V SW 1 C1 10 uF 2 7 R3 6 1 kΩ 741 3 4 RF R2 1 kΩ 470 Ω R5 R4 1 kΩ 560 Ω LED2 R1 Green SW 2 470 Ω LED1 -9 V Red FIGURE 3.1: 741 BISTABLE MULTIVIBRATOR Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 22 DBE/PAT 2020 NSC OBSERVATIONS 2. Press switches S1 and S2 respectively. Write down the polarity of the input pulses and output when the switches are pressed. (4) Polarity of input pulse Polarity of output signal S1 S2 3. Which LED is ON when S1 is pressed? Motivate why. (3) 4. Which LED is ON when S2 is pressed? Motivate why. (3) 5. Explain why this circuit is known as a bi-stable multivibrator. Refer to the input signals, its polarity, the output signal, its polarity and the time that the circuit remains in each state. (5) Subtotal: Activity 3A [15] Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 23 DBE/PAT 2020 NSC Facet sheet 3A: 741 Bi-stable multivibrator MAXIMUM LEARNER FACET 1 FACET 2 FACET 3 FACET 4 POSSIBLE MARK MARKS Collect instruments – Collect hand ID components correctly Collect PSU/Mini Trainer Prepare for the Simulation multimeter tools 4/2 = 2 (1) (1) (1) (1) Use long-nose pliers Use wire stripper Use side cutters correctly Hand Tools correctly correctly 3/3 = 1 (1) (1) (1) Preparation for Insertion of Set supply voltage Check the pinout of the 741 IC Components into correctly at +9V 0V -9V 2/2=1 (1) Breadboard. (1) Correct Connection on Correct connection of 741 IC Polarity and connection of Polarity of both LEDs – Breadboard – Nodes and to supply switches - correct correct 6/2=3 Polarity (2) (2) (2) S2 is pressed - LED 2 S1 is pressed – LED 1 (red) ON Circuit Is Working Correct (green) ON 2/2=1 (1) (1) Cleaning the working area after Replace tools in correct Housekeeping the experiment places after work 2/2 = 1 (1) (1) Observing safety before being Observing safety after Safety reminded being reminded 2/2 = 1 (2) (1) SUBTOTAL FACET 3A 10 Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 24 DBE/PAT 2020 NSC SIMULATION 3B: 555 IC Astable multivibrator PURPOSE: Construct a simple circuit using the 555 IC to build a clock pulse generator (astable multivibrator) and display output waveforms on an oscilloscope REQUIRED RESOURCES: TOOLS/INSTRUMENTS MATERIALS Analogue/Digital trainer 1 x 555 timer IC Analogue/Digital oscilloscope 1 x 220 Ω resistor Function generator 1 x LED Variable DC power supply 1 X 10 nF capacitor Side cutters 1 x 10 KΩ resistor Wire stripper 1 x 100 KΩ pre-set POT 1 x 10 µF (electrolytic capacitor 16 V) Connecting wires PROCEDURE 1. Construct the circuit on the breadboard as in FIGURE 3.2. Connect channel 1 of the oscilloscope across C1. Connect channel 2 of the oscilloscope to pin 3 of the 555 IC. Switch ON the circuit and observe. Answer the questions that follow. +9V R1 10K 8 4 7 V+ RST DISCHARGE VR1 3 6 100K THR 555 OUT 2 TRIGGER GND 1 5 R2 470E SCOPE SCOPE CH2 CH1 C1 D 10µF SCOPE CH1 -9V FIGURE 3.2 Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 25 DBE/PAT 2020 NSC 2. Draw the output waveform observed on the oscilloscope on the grid provided. V/Div:___________ (Ch 1) V/Div:___________ (Ch 2) T/Div: ___________ NOTE: 1 mark for each correctly drawn waveform. 1 mark for the oscilloscope settings. (3) QUESTIONS: 3. List the components responsible for the frequency of the output. (3) 1 2 3 Learner was able to Learner was able to Learner was able to construct a minimum part construct a part of the construct the whole of the circuit correctly circuit correctly without circuit correctly without with assistance assistance assistance The learner failed to get The learner was able to The learner was able to the output wave on the set the oscilloscope and set the oscilloscope and oscilloscope managed to get the managed to get the output wave after the output wave without the assistance from the assistance of the teacher teacher Learner did not do any Learner did Learner did housekeeping duties housekeeping after being housekeeping without reminded being reminded (9) [15] Subtotal: Activity 3A (15) Subtotal: Facet sheet 3A (10) Subtotal: Activity 3B (15) TOTAL SIMULATION 3 [40] Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 26 DBE/PAT 2020 NSC This simulation is an OPTION to do in the place of simulation 3A. SIMULATION 3C: 741 op-amp as a non-inverting amplifier PURPOSE Construct a simple circuit using the 741 op-amp to build a non-inverting amplifier and display the input/output waveforms on an oscilloscope Activity 1A: Construct a circuit using the 741 op-amp. REQUIRED RESOURCES TOOLS/INSTRUMENTS MATERIALS Analogue/Digital trainer 1 x LM741 IC Analogue/Digital oscilloscope 2 x 1 kΩ resistor Function generator 2 x 10 kΩ resistor Dual power supply 9V 0 -9V 1 x 5 kΩ resistor Side cutters Connecting wires Wire stripper PROCEDURE: 1. Construct the circuit, as in FIGURE 1.1, on the breadboard. Set the function generator to give a sine wave output of 1 V peak at a frequency of 1 000 Hz (1 kHz). Connect channel 1 of the oscilloscope to pin 3 of the 741 IC. Connect channel 2 of the oscilloscope across RL (pin 6). Switch on the power to the circuit and observe the input and output waveforms. Draw the input and output waveforms. Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 27 DBE/PAT 2020 NSC R2 1K 7 3 5 6 LM741 2 1 1V – 1KHz 4 R3 RL 100E 10K Rf 10K R1 1K FIGURE 2.1: NON INVERTING AMPLIFIER 2. Draw the output waveform observed on the oscilloscope on the grid provided. V/Div:___________ (Ch 1) V/Div:___________ (Ch 2) T/Div: ___________ NOTE: 1 mark for each correctly drawn waveform. 1 mark for the oscilloscope settings. (3) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 28 DBE/PAT 2020 NSC QUESTIONS: 1. Calculate the gain of the amplifier with the given resistor values. (3) 2. Measure the voltages across R1, RF and RL: (3) VR1 VRF VRL 3. Replace RF with a 5 kΩ resistor. (3) VR1 VRF VRL 4. How did this change affect the output of the amplifier? Motivate your answer. (3) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 29 DBE/PAT 2020 NSC Facet sheet 3C: 741 non-inverting op-amp MAXIMUM LEARNER FACET 1 FACET 2 FACET 3 FACET 4 POSSIBLE MARK MARKS Collect instruments – Collect Hand ID components correctly Collect PSU/Mini Trainer Prepare for the Simulation multimeter Tools 4/2 = 2 (1) (1) (1) (1) Use long-nose pliers Use wire stripper Use side cutters correctly Hand Tools correctly correctly 3/3 = 1 (1) (1) (1) Set supply voltage Preparation for Insertion of Check the pinout of the 741 IC correctly at Components into 2/2=1 (1) +9V 0V -9V Breadboard. (1) Correct Connection on Correct connection of 741 IC Measurement across R1, Breadboard – Nodes and to supply RF and RL 3 Polarity (2) (1) Vout is not inverted with Vout is not inverted with Circuit Is Working Correct RF= 10 kΩ RF= 5 kΩ 2/2=1 (1) (1) Cleaning the working area after Replacing tools after work Housekeeping the experiment 2/2 = 1 (1) (1) Observing safety before being Observing safety after Safety reminded being reminded 2/2 = 1 (2) (1) TOTAL 10 Subtotal: Activity 3C (15) Subtotal: Facet sheet 3C (10) Subtotal: Activity 3B (15) TOTAL Simulation 3 [40] Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 30 DBE/PAT 2020 NSC 4.4 Simulation 4: Connect a 7-segment display to a 4-bit BCD 7-segment driver Name of learner: Mark: Class: Date completed: 40 Date assessed: Assessor signature: Date moderated: Moderator signature: PURPOSE: Construct a simple circuit to connect a 7-segment display to a 4-bit BCD 7-segment display driver. Activity 4A : Connect a 7-segment display to a 4-bit BCD 7-segment driver. RESOURCES: TOOLS/INSTRUMENTS MATERIALS Analogue/Digital trainer 4 x LEDs Breadboard 4 x 390 ῼ resistors Variable DC power supply 7 x 1k resistors Side cutters CD4511 IC Breadboard Wire CD4518B IC 5 x SPST switches 7-segment display Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 31 DBE/PAT 2020 NSC PROCEDURE Construct the circuit as in FIGURE 4.1 below: b c 7-SEGMENT a g d DISPLAY f e 1K each resistor 13 12 11 10 9 15 14 a b c d e f g SW3 CD4511 SW4 D C B A 6 2 1 7 6 5 4 3 Q4A Q3A Q2A Q1A D1 D2 D3 D4 CD4518B CKA ENA CKA Res etA R1 R2 R3 R4 GND1 GND2 GND3 GND4 CLK SW1 SW2 GND FIGURE 4.1 An alternative circuit can be used. Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 32 DBE/PAT 2020 NSC FACET SHEET 8: Connect a 7-segment display to a 4-bit BCD 7-segment driver MAXIMUM LEARNER FACET 1 FACET 2 FACET 3 FACET 4 POSSIBL E MARKS MARK Collect Identify components correctly Collect PSU/MiniTrainer Collect hand tools Prepare for the Simulation instruments – 4 (1) oscilloscope Use side cutters correctly Hand Tools Use wire stripper correctly 2/2 = 1 Preparation for Insertion of Check the datasheet Set supply voltage correct at Components into on the ICs +9 V 2 Breadboard. (1) (1) 8 nodes for correct connection 20 nodes for correct Correct Connection on of CB4518B IC connection of CD4511 IC and Breadboard – Nodes and (8/2 = 4) the 7-segment display Polarity (20/2 = 10) 14 Cleaning the working area after Replace tools in the correct Housekeeping the experiment places after work 2 (1) (1) Observing safety before being Observing safety after being Safety reminded reminded 2 (2) (1) Total 25 Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 33 DBE/PAT 2020 NSC Activity 4B Conduct the following steps and answer the questions in the space provided. IC CD4185 GIVEN CODE 7-SEGMENT DISPLAY a Which number is displayed on 7-segment display if the binary number 0111 is illuminated on the output LED's of the counter? (3) b Which number is displayed on 7-segment display if the binary number 1000 is illuminated on the output LED's of the counter? (3) c Which number is displayed on 7-segment display if the binary number 1001 is illuminated on the output LED's of the counter? (3) d Which number is displayed on 7-segment display if the binary number 0011 is illuminated on the output LED's of the counter? (3) e Which number is displayed on 7-segment display if the binary number 0101 is illuminated on the output LED's of the counter? (3) (15) Subtotal: Activity 4A 25 Subtotal: Activity 4B 15 Total: Simulation 4 40 Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 34 DBE/PAT 2020 NSC 4.5 Simulation 5: RS latch and PICAXE flow diagram Name of learner: Mark Class: Date Completed: 40 Date Assessed: Assessor Signature: Date Moderated: Moderator Signature: PURPOSE To study the RS latch as a practical circuit. To compare the theory learned in class with the actual circuit. To build a RS latch. Activity 5 A: Construction of the RS latch. REQUIRED RESOURCES TOOLS/INSTRUMENTS MATERIALS Experiment board 74L500 IC Voltmeter Toggle switches x 2 Dual power supply 9V-0- 9V 1 kΩ resistor x 2 Dual power supply 5V-0- 5V 220 Ω resistor x 2 Side cutters 1 x red and 1 x green LED Wire stripper Connecting wires Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 35 DBE/PAT 2020 NSC CIRCUIT DIAGRAM Construct the circuit, as in FIGURE 6.1, on the breadboard. After you switch on the circuit, press the set switch. You will be assessed with the rubric below 1kΩ 220Ω 1 3 S 2 Q 4 6 5 Q R 1kΩ 220Ω FIGURE 6.1: CIRCUIT DIAGRAM OF A RS LATCH RUBRIC Level descriptor Mark 1 2 3 5 obtained The learner The learner The learner did The leaner could not identified the build the circuit managed to identify the correct after the identify the correct components assistance of the correct components but could not teacher components and build the build the circuit circuit on the without the breadboard assistance of the teacher The learner The learner The learner The learner could not use managed to managed to use managed to use the calibrate the instruments the instruments measuring instruments and managed to and managed to instruments after the get ONE reading get all the assistance of required after the readings required the teacher assistance of the without the teacher assistance of the teacher (10) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 36 DBE/PAT 2020 NSC OBSERVATIONS: 1. Press the reset and set switches. Write down your observations. (3) 2. Press both reset and set switches simultaneously. Write down your observation (3) 3. Complete the truth table based on the operation of the circuit you have constructed INPUTS OUTPUTS S R Q Q 0 0 0 1 1 0 1 1 (4) HOUSEKEEPING When you have obtained all the measurements and the teacher has validated all your answers you must tidy up your workplace as part of the safety in the workshop. You will be assessed on housekeeping with the rubric below. Level descriptor Mark obtained 0 2 3 5 The candidate The candidate The candidate The candidate did not do any did do house- did do did house- house-keeping. keeping after housekeeping, keeping on the teacher but only tidy up his/her own reminded the his/her own and help to tidy candidate. workplace and up the entire did not help in workshop. cleaning the rest of the workshop. (5) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 37 DBE/PAT 2020 NSC PICAXE PURPOSE To test knowledge of flow diagrams and PICAXE. Activity 6B: Using PICAXE draw a flowchart of a control system for counting cars entering and leaving a car park using two digital sensors. (15) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 38 DBE/PAT 2020 NSC 5. SECTION B – DESIGN AND MAKE Design and Make Project Time: January to August 2020 Learner Name: School: Class: Title/Type of Project: INSTRUCTIONS  This section is COMPULSORY for all learners.  The teacher will choose a circuit for the project.  Any project constructed must include at least (but is not limited to): o Seven components o A variety of components (both active and passive) o PCB making in some form o Soldering o An enclosure with a switch and protection  The checklist below must be used to ensure that all the required tasks for the PAT have been completed. PAT CHECKLIST The learner MUST fill in this checklist for the teacher BEFORE marking of that section takes place! NO. DESCRIPTION TICK () NO YES Design and Make: Part 1 1. Circuit diagram drawn   2. Circuit description filled in   3. Component list completed   4. Tools list for circuitry populated   5. Measuring instrument list filled in   6. Evidence of prototyping printed and pasted into the file   7. Learner's own Veroboard/PCB planning/design printed and included in file   Design and Make: Part 2 1. Enclosure design completed and included in the file   2. Unique name written down and on the enclosure   3. Logo designed and on the enclosure   Miscellaneous 1. Enclosure included in the project   2. Enclosure prepared and drilled according to the design   3. Enclosure finished off and completed with name and logo   4. PCB securely mounted in the enclosure using acceptable techniques   5. Circuit inside the enclosure accessible   6. Internal wiring neat and ready for inspection   7. File and project completed and ready for moderation at the workshop/room   Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 39 DBE/PAT 2020 NSC 5.1 Design and Make: Part 1 5.1.1 Circuit diagram Draw a circuit diagram of your project and add it after this page. 5.1.2 Project: Description of operation Use the space below to provide an overview of how the project functions. Use your own words and do some research of your own. Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 40 DBE/PAT 2020 NSC 5.1.3 Component list Draw up a list of components you will need from the circuit diagram. LABEL DESCRIPTION AND VALUE QUANTITY 5.1.4 Tools/Instrument List Draw up a list of tools you will need to complete the PAT circuitry. You may add to the list as you proceed through the PAT. DESCRIPTION PURPOSE 5.1.5 Evidence of prototyping Take photographs of the working prototype on the breadboard using a digital camera or cellphone and insert it here. Add your name on the photograph. Add the pictures after this page. 5.1.6 PCB design Design a printed circuit board layout for the circuit you are going to build. Print it out and attach after this page. Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 41 DBE/PAT 2020 NSC 5.2 Assessment of the Design and Make Phase: Part 1 Achieved = 1 Mark Not achieved =  NO. FACET DESCRIPTION Circuit Diagram 1. The circuit diagram was drawn using EGD equipment. 1 2. The circuit diagram was drawn using CAD/any electronic 1 design software. 3. The circuit diagram was drawn using correct symbols. 1 4. The circuit diagram has all labels – R1, C1, Tr1, etc. 1 5. The circuit diagram has all component values –100 Ω, 1 220 μF, etc. 6. The circuit diagram has a name / title. 1 7. The circuit diagram has a frame and title block. 1 (EGD approach). Component List 8. Labels correlate with circuit diagram. 1 9. Description and values correlate with circuit diagram. 1 10. Quantities are correct. 1 Description of Operation 11. Basic function of the circuit is described correctly. 1 12. All sub circuits in the circuit diagram and component list 1 are included in the description. 13. Purposes of sub circuits in the circuit diagram are described 1 correctly. 14. Learner used own interpretation and did not copy from 1 another source verbatim. 15. Sources are acknowledged. 1 Tools/Instrument List 16. The tools/instrument list has been completed. 1 17. The tools/instruments listed all have a purpose for being used. 1 Evidence of Prototyping on Breadboard 18. Unique, original photos of the prototyping are included. 1 19. Unique, original photos include the learner name. 1 20. Photos are clear and in focus: 1 All components are clearly identifiable. 21. Prototype is operational. No photo, no mark. 2 PCB Design 22. Printed Circuit Board design is included in the PAT file. 1 23. PCB Design is made using a CAD approach. 3 24. Component overlay showing placement is included. 1 25. Components are labelled the same as in the circuit diagram. 1 26. The design is original and does not match any other learner's 1 design. 27. Board layout (tracks/current flow) is functional and matches 1 the original circuit diagram. Circuit Board Manufacturing 28. Circuit board is etched neatly according to the PCB design. 5 29. The learner's name is etched onto the circuit design. 1 30. The PCB is tinned neatly. 1 31. The soldered PCB, solder side, is covered with a clear 1 protective coating (Plastic 70/clear lacquer). 32. Holes are drilled neatly and are aligned in the middle of the 1 pads on the PCB. Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 42 DBE/PAT 2020 NSC Achieved = 1 Mark Not achieved =  NO. FACET DESCRIPTION 33. Mounting holes of the PCB are drilled symmetrically. 1 34. All burrs are removed. 1 35. The PCB is cut neatly/squarely and edges are filed neatly. 1 36. Axial and radial components are placed neatly and flush with 1 the board. 37. Component orientation are aligned between similar 1 components (e.g. the gold band of all resistors are placed on the same side). 38. Soldered components – leads are cut off, flush and neat on 2 the solder side. 39. More than 60% of the solder joints are shiny (not dry joints). 2 40. Wire insulation is stripped to the correct length (no extra 2 copper showing). 41. Wiring is long enough to allow for dismantling and inspection. 1 42. Wiring is wrapped neatly. 1 43. A power switch is included and fitted to the enclosure. 2 44. A fuse/protection is included and fitted correctly where 2 applicable. 45. Wiring entering/exiting the enclosure is provided with a 2 grommet/applicable fittings/sockets where applicable. 46. Batteries are mounted using a battery housing/mounting 1 bracket and battery clip (NO double-sided tape). 47. The project has a pilot light/LED installed in the enclosure 1 showing when the circuit is operational. (Switch is on – must go out when fuse is blown.) 48. The project is fully operational and commissioned/installed in 10 the enclosure. TOTAL (PART 1 = 70 marks) NOTE: In projects where facets 43 and 44 are not applicable, the projects should be marked out of 66, and the totals adjusted accordingly. Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 43 DBE/PAT 2020 NSC 5.3 Design and Make: Part 2 5.3.1 Enclosure design  Design an enclosure for your project.  NO FREEHAND DRAWINGS.  Draw using EGD equipment OR use a CAD program.  Draw in first-angle orthographic projection.  Add your drawings after this page.  Use colour to enhance your drawing. 5.3.2 Manufacture the enclosure neatly according to your design. You may use pre-cut panels from metal, wood and or perspex/ plexiglass. You must, however, construct/assemble these parts. Injection moulded enclosures are also acceptable. It is important that your enclosure and the placement of the parts align with your design. 5.3.3 Choose a name for your device. Write down the name of the device below. 5.3.4 Design a unique logo for your device, as well as a specification plate and attach it after this page. [20] Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 44 DBE/PAT 2020 NSC 5.4 Assessment of the Design-and-Make-Phase: Part 2 Achieved = 1 Mark Not achieved =  NO. FACET DESCRIPTION Enclosure Design 1. Enclosure design is included in first-angle orthographic 1 projection. 2. Drawn design includes a title box and page border. 1 3. Isometric drawing included additionally. 1 4. Dimensions are included. 1 5. The name of the device is written in the PAT document. 1 6. The logo design and specification plate design is in the PAT 2 document. Subtotal (7 marks max.) Enclosure Manufacturing 7. Enclosure matches the design. 1 – Dimensions and placement correlate. 8. Name of the device is attached on the enclosure. 1 9. The logo design is attached on the enclosure. 1 10. The logo design on the enclosure is durable and not merely a 1 paper pasted on the enclosure (painted/used decoupage/screen printed/sublimation printed). 11. The enclosure is manufactured from scratch/pre-cut 3 parts. Does NOT include: cardboard, paper, margarine container Does include: sheet metal, Perspex, Plexiglas, wood, glass and other raw materials, injection-moulded plastic boxes 12. Holes/Cut-outs in the enclosure are made with the 2 appropriate tools. 13. Specification plate with the learner's name, operating 1 voltage, fuse rating and additional information on the project. 14. Enclosure is neatly prepped, painted and aesthetically 2 pleasing. 15. The circuit board is mounted using appropriate methods inside 1 the enclosure. (NO double-sided tape, Prestik, glue, chewing gum, masking tape, etc.) Subtotal (13 marks max.) TOTAL (PART 2 = 20 marks) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 45 DBE/PAT 2020 NSC 6. PROJECTS 6.1 Practical Project (Electronics):Traffic Light RESOURCES TOOLS/INSTRUMENTS MATERIALS  Oscilloscope (analogue/digital)  100 kΩ resistor  Analogue/Digital trainer with dual power supply  220 Ω resistor x 3  Electronics multimeter  22 kΩ resistor x 1  Soldering iron  LED green x 1  Helping hands  LED yellow x 1  PCB etching tank or similar  LED red x 1  Solder sucker  1 µF capacitor x 2  Wire-stripper  10 µF capacitor x 1  Side cutters  470 kΩ variable resistor x 1  IC NE555  IC CD 4017  1N4007 diode x 6  PCB 150 x 100 mm  Solder  PCB etching chemicals CIRCUIT DIAGRAM TRAFFIC LIGHT CIRCUIT 1mF 100K 1mF 8 4 16 7 470K NE 555 3 14 CD 4017 15 22K 6 2 1 5 6 9 11 10 1 2 3 4 7 10mF 220Ω 220Ω 220Ω GREEN YELLOW RED Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 46 DBE/PAT 2020 NSC 6.2 Practical Project (Digital Electronics): Cellphone detector Cellphones are widely used in the world. While people have to be connected to one another, there are situations or places where the usage has to be prohibited, either due to security reasons or because it may be a health hazard. Cellphone detection has been under investigation for a long time. There are techniques that have been formulated or proposed on how to detect cellphones. Most of them use features such as the audio system, RF system and common materials of the cellphone to try and look into how it can be used to detect mobile phones. This project utilises the RF system of the cellphone as the feature to detect its presence. A circuit that detects signals of the range 0,9 GHz to 3 GHz is used to detect a cellphone when in use. When the signal is detected, an LED blinks to indicate the usage of a cellphone within a radius of 1,5 metres. It is therefore a reality that mobile usage in some places must be prohibited. Due to the privacy laws that limit the use of cellphone jammers, cellphone detectors must be designed and installed so that in case a person gets into such places with a cellphone, they can be notified and either be told to switch it off or to remove it. The effectiveness of cellphone detectors is that they continually scan for the presence and usage of cellphones and sound an alarm to notify the user or security personnel. This project is limited to the detection of a cellphone that is in use: on call, communication via SMS and internet access. The detection of cellphones that are on standby mode, switched off or on airplane mode will not be included in this project. TOOLS/INSTRUMENTS MATERIALS  Oscilloscope (analogue/digital)  Op amp CA3130  Analogue/Digital trainer with dual power supply  2,2 M resistor (2)  Electronics multimeter  100 K resistor (1)  Soldering iron  1 K resistor (3)  Helping hands  100 nF capacitor (4)  PCB etching tank or similar  22 pF capacitor (2)  Solder sucker  100 uF capacitor  Wire-stripper  Breadboard  Side cutters  9 volt battery  Battery connector  LED  Transistor BC547  Transistor BC557  Connecting wires  Buzzer  Antenna Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 47 DBE/PAT 2020 NSC R4 1K R1 2.2M 7 8 R6 Q2 BC557 3 + 1K R3 B1 Q1 9V 1 C5 BC547 2 - 100µF 1K C2 5 4 1 100nF R5 2.2M C4 100µF R2 100K D1 C3 C7 LED-BLUE BUZ1 C1 100nF 22pF 100µF C6 22pF CELLPHONE DETECTOR CIRCUIT Copyright reserved

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 48 DBE/PAT 2020 NSC 6.3 Programmable Buggy K1-K4 is responsible for inputs for forward and backward movement of the buggy. K5 is the OK button. When the buggy is switched on, The red LED will be on and the buggy is ready to be programmed. (K1 = Turn right, K2 = Turn left, K3 = Reverse, K4 = Forward) When the buggy is ready, the green LED will flash. This means the instructions entered are valid. After the program is set, press K5 = OK button to execute all instructions. The buggy can accept up to 30 input commands at a time. When the commands are executed, the green and red LEDs will emit simultaneously. CIRCUIT R4 Q4 R3 R8 R7 82 Ω 8050D 82 Ω 82 Ω Q12 82 Ω Q5 8550D Q10 R6 8050D R5 R10 8550D R9 1 kΩ M1+ 1 kΩ 1 kΩ M2+ 1 kΩ Q15 Q14 Q9 9014 M1- M2- 9014 9014 Q6 Q13 8050D 8050D Q7 Q12 8050D 8050D M1+ IC 1 14 OUT 1 OUT 2 2 CN OUT 3 13 3 K5 OUT 4 12 CONFIRM 4 VDD GND 11 LED 1 K5 5 10 K4 CN 6 K3 K2 9 TURN RIGHT K4 7 CN K1 8 DIP 14 TURN LEFT R2 K3 560 Ω BACKWARD K1 VDD LED 2 3V FORWARD C2 + C1 K2 + 100 µF 100 µF 10 V 10 V R1 S1 560 Ω Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 49 DBE/PAT 2020 NSC RESOURCES NO. POSITION ITEM DESCRIPTION QTY 1 IC IC LGW-17368-SCH02 1 /NY8A053BP14 2 C1,C2 Capacitor 100 µF 10 V (size 5X7 mm) 2 3 R5,R6,R9,R10 Resistor 1 kΩ - ¼ W 4 4 R3,R4,R7,R8 Resistor 82 Ω - ¼ W 4 5 R1,R2 Resistor 560 Ω - ¼ W 2 6 Q8,Q9,Q14,Q15 Transistor 9014C 4 7 Q4,Q5,Q10,Q11 Transistor 8550D 4 8 Q6,Q7,Q12,Q13 Transistor 8050D 4 9 LED1 LED 5 mm YELLOW COLOR 1 10 LED2 LED 5 mm RED COLOR 1 11 K1,K2,K3,K4,K5 Tact Switch 6 x 6 x 5 mm 5 12 S1 On/Off Switch 8 mm 1 13 MOT 1, MOT 2 Gear Box Sped rate: 1/120 Straight Shape 2 14 BH-3V Battery holder AA x 2 : 58 x 34 mm. 1 15 M+ Wire 3+50+3 red 2 16 M- Wire 3+50+3 black 2 17 W1 Univ. Wheel 37x17x10 mm 1 18 Plast. Wheel 37x15 mm 2 19 Gear box Screw Round head PM 3x25 mm 4 20 Battery Holder Screw Flat head KM 3x6 mm 2 21 Univ. Wheel Screw Round head PB 2 3x6x D=4 4 22 Screw Meson Head PWA 7x5 mm W5 1 23 M3 Screw nut M3 6 24 Gear Box Support Plastic A 26 x 10 x 10 mm 2 25 Gear Box Support Plastic B 26 x 10 x 7 mm 2 Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Digital Electronics 50 DBE/PAT 2020 NSC 7. CONCLUSION On completion of the practical assessment task learners should be able to demonstrate their understanding of the industry, enhance their knowledge, skills, values and reasoning abilities as well as establish connections to life outside the classroom and address real-world challenges. The PAT furthermore develops learners' life skills and provides opportunities for learners to engage in their own learning. Copyright reserved