Electrical Technology PAT GR 12 2020 (Electronics) Eng

Downloaded from hlayiso.com ELECTRICAL TECHNOLOGY (ELECTRONICS) GUIDELINES FOR PRACTICAL ASSESSMENT TASKS GRADE 12 2020 These guidelines consist of 51 pages. Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 2 DBE/PAT 2020 NSC TABLE OF CONTENT PAGE 1. INTRODUCTION 3 2. TEACHER GUIDELINES 4 2.1 How to administer PATs 4 2.2 How to mark/assess the PATs 4 2.3 PAT Assessment Management Plan 5 2.4 Moderation of PATs 6 2.5 Absence/Non-submission of tasks 6 2.6 Simulations 7 2.7 Projects 7 2.8 Working marks sheet 8 3. LEARNER GUIDELINES 9 3.1 Instructions to learners 10 3.2 Declaration of Authenticity 10 4. SIMULATIONS 11 4.1 Simulation 1: RLC series circuit 11 4.2 Simulation 2: Semiconductors – JFET amplifier and Darlington pair 16 4.3 Simulation 3: Switching circuits – 741 bistable multivibrator and 555 astable multivibrator 23 4.4 Simulation 4: 741 op-amp Schmidt trigger and summing amplifier circuit 31 4.5 Simulation 5: Colpitts oscillator 36 5. SECTION B: DESIGN AND MAKE 40 5.1 Design and Make: Part 1 41 5.2 Assessment of the Design and Make phase: Part 1 43 5.3 Design and Make: Part 2 45 5.4 Assessment of the Design and Make phase: Part 2 46 6. PROJECTS 47 6.1 Practical Project 1: 5 Watt Mini-amplifier (portable speaker) 47 6.2 Practical Project 2 (Electronics): Traffic light 49 6.3 Practical Project 3: Line-following buggy 50 7. CONCLUSION 51 Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 3 DBE/PAT 2020 NSC 1. INTRODUCTION The 17 Curriculum and Assessment Policy Statements subjects which contain a practical component all include a practical assessment task (PAT). These subjects are:  AGRICULTURE: Agricultural Management Practices, Agricultural Technology  ARTS: Dance Studies, Design, Dramatic Arts, Music, Visual Arts  SCIENCES: Computer Applications Technology, Information Technology, Technical Sciences  SERVICES: Consumer Studies, Hospitality Studies, Tourism  TECHNOLOGY: Civil Technology, Electrical Technology, Mechanical Technology and Engineering Graphics and Design A practical assessment task (PAT) mark is a compulsory component of the final promotion mark for all candidates offering subjects that have a practical component and counts 25% (100 marks) of the end-of-the-year examination mark. The PAT is implemented across the first three terms of the school year. This is broken down into different phases or a series of smaller activities that make up the PAT. The PAT allows for learners to be assessed on a regular basis during the school year and it also allows for the assessment of skills that cannot be assessed in a written format, e.g. test or examination. It is therefore important that schools ensure that all learners complete the practical assessment tasks within the stipulated period to ensure that learners are resulted at the end of the school year. The planning and execution of the PAT differs from subject to subject. Practical assessment tasks are designed to develop and demonstrate a learner's ability to integrate a variety of skills in order to solve a problem. The PAT also makes use of a technological process to inform the learner what steps needs to be followed to derive a solution for the problem. The PAT consists of four or more simulations and a practical project. The teacher may choose any one of the practical projects and any four simulations available for power systems. The teacher must apply assessment on an ongoing basis at the same time that the learner is developing the required skills. Four simulations should be completed by the learners, in addition to the manufacturing of a practical project. The PAT incorporates all the skills the learner has developed throughout the year. The PAT ensures that all the different skills will be acquired by learners on completion of practical work, as well as the correct use of tools and instruments. Requirements for Presentation Each learner must present the following:  PAT file with all the evidence of simulations, design and prototyping. A copy of the PAT 2020 cover page. The relevant simulations and assessment sheets should be copied and handed to each learner to include in the file.  Practical project with: o Enclosure:  The file must include a design.  The enclosure and the design must match.  No cardboard boxes are allowed.  Plastic and metal enclosures are acceptable.  The enclosure should be accessible for scrutiny inside.  Lids that are secured with screws are preferred. Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 4 DBE/PAT 2020 NSC o Circuit board:  The file should include the PCB design.  The PCB must be mounted inside the enclosure in such a manner that it can be removed for scrutiny.  Switches, potentiometers, connectors and other items must be mounted.  Wiring must be neat and bound/wrapped.  Wiring must be long enough to allow for the PCB to be removed and inspected with ease. o Logo and name:  The file should contain the logo and name design.  Logo and name must be prominent on the enclosure. The PAT will have a financial impact on the school's budget and school management teams are required to make provision to accommodate this particular expense. PAT components and other items must be acquired timeously, for use by the learners, before the end of the first term at the start of the academic year. It is the responsibility of the HOD to ensure that the teacher is progressing with the PAT from the start of the school year. Provincial departments are responsible for setting up moderation timetables and consequently PATs should be completed in time for moderation. 2. TEACHER GUIDELINES 2.1 How to administer PATs Teachers must ensure that learners complete the simulations required for each term. The project should be started in January in order to ensure its completion by August. In instances where formal assessments take place, the teacher has to assume the responsibility thereof. The PAT should be completed during the first three terms and must be ready at the start of PAT moderation. Teachers must make copies of the relevant simulations and hand it to learners at the beginning of each term. The PAT must not be allowed to leave the workshop and must be kept in a safe place at all times when learners are not working on it. The weightings of the PAT must be adhered to and teachers are not allowed to change weightings for the different sections. 2.2 How to mark/assess the PATs The PAT for Grade 12 will be set and assessed internally, but moderated externally. All formal assessment will be done by the teacher. The teacher is required to produce a working model and model answer file that sets the baseline for assessment at a Highly Competent Level for every project choice exercised by the learners. This file must include all the simulations with answers the teacher has done him/herself. The teacher will use the model answers and project to assess the simulations and projects of the learners. Once a facet sheet has been completed by the teacher, assessment will be deemed to be complete. No re-assessment will be done once the facet sheets have been completed and captured by the teacher. Learners must ensure that the work is done to the required standard before the teacher finally assesses the PAT during each stage of completion. Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 5 DBE/PAT 2020 NSC 2.3 PAT Assessment Management Plan The assessment plan for the PAT is as follows: TIME FRAME ACTIVITY RESPONSIBILITY Preparation for Teacher – Builds the models and works out the model answers for PAT 2020 the simulations for 2020. Identifies shortages in tools, equipment and consumable items for simulations that must be procured in 2020 SMT – Receives procurement requests from teachers and processes payments for the acquisition of required items January–March Simulations 1 Teacher – Copies and hands out simulations 2020 and 2 Learners – Complete simulations Teacher – Assesses simulations HOD – Checks if tasks have been completed and marked by the teacher before the holiday January 2020 PAT project – Teacher – Obtains quotations for PAT projects procurement Principal – Approves PAT procurement for PAT projects Teacher – Ensures that PAT projects are ordered and delivered HOD – Checks in on teacher to see if the process is adhered to February 2020 PAT project – Teacher – Ensures that there is secure storage for PAT projects learners Teacher – Hands out and takes in PAT projects commence with Teacher – Includes practical sessions for learners to complete the project PAT project every week Learners – Commence with completion of the PAT project HOD – Checks in on teacher to ensure that practical workshop sessions take place on a weekly basis April–June Moderation of District subject facilitator/subject specialist will visit the school and 2020 Simulations 1 moderate Simulation 1 and 2 and 2 10% of learners' work is moderated April–June Simulations 3 Teacher – Copies and hands out simulations 2020 and 4 Learners – Complete simulations Teacher – Assesses simulations HOD – Checks if tasks have been completed and marked by the teacher before the holiday April–June PAT project – Teacher – Ensures that there is secure storage for PAT projects 2020 learners Teacher – Hands out and takes in PAT projects continue with Teacher – Includes practical sessions for learners to complete the project PAT project every week Learners – Continue with completion of the PAT project HOD – Checks in on teacher to ensure that practical workshop sessions take place on a weekly basis July holidays PAT Learners that are behind on the PAT are required to complete the 2020 intervention project during this holiday. July–August Moderation of District subject facilitator/subject specialist will visit the school and 2020 Simulations 3 moderate Simulations 3 and 4 – different learners from the previous and 4 term 10% of learners' work is moderated July–August PAT project – Teacher – Ensures that there is secure storage for PAT projects 2020 completion Teacher – Hands out and takes in PAT projects Teacher – Completes the PAT project with learners and compiles the PAT file Learners – Complete the PAT project and file HOD – Checks to see that 100% of the PAT files and projects are completed and assessed September– PAT PAT projects are moderated by subject facilitators/subject October 2020 moderation specialists from the province and learners are available to demonstrate skills 10% of learners are moderated randomly Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 6 DBE/PAT 2020 NSC 2.4 Moderation of PATs Provincial moderation of each term's simulations will start as early as the following term. Simulations 1 and 2 should be moderated as soon as the second term starts. Similarly, Simulations 3 and 4 will be moderated in July. The project will, however, only be moderated on completion. During moderation of the PAT the learner's file and project must be presented to the moderator. The moderation process is as follows:  During moderation, learners are randomly selected to demonstrate the different simulations. All four simulations will be moderated.  The teacher is required to build an exemplar model for each project type chosen for the school.  This model must be on display during moderation.  The teacher's model forms the standard of the moderation at Level 4 (Highly Competent).  Level 5 assessments must exceed the model of the teacher in skill and finishing.  Learners who are moderated will have access to their files during moderation and may refer to the simulations they completed earlier in the year.  Learners may NOT ask assistance from other learners during moderation.  All projects and files must be on display for the moderator.  If a learner is unable to repeat the simulation or cannot produce a working circuit during moderation, marks will be deducted and circuits assessed as not being operational.  The moderator will randomly select no fewer than two projects (not simulations) and the learners involved will have to explain how the project was manufactured.  Where required, the moderator should be able to call on the learner to explain the function and principles of operation, and request the learner to exhibit the skills acquired through the simulations for moderation purposes.  On completion the moderator will, if needed, adjust the marks of the group upwards or downwards, depending on the outcome of moderation.  Normal examination protocols for appeals will be adhered to, if a dispute arises from adjustments made. 2.5 Absence/Non-submission of tasks The absence of a PAT mark in Electrical Technology without a valid reason: The learner will be given three weeks before the commencement of the final end-of-year examination to submit outstanding task. Should the learner fail to fulfil the outstanding PAT requirement, such a learner will be awarded a zero (0) for that PAT component. Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 7 DBE/PAT 2020 NSC 2.6 Simulations Simulations are circuits, experiments and tests/tasks which the learner will have to build, test and measure and practically do as part of the development of practical skills. These skills have to be illustrated to the external moderator that visits the school at intervals during the school year. Teachers who make use of simulation programs on a computer may use it for the learners to practice on. However, it is required that the circuit be built using real components and that measurements be made with actual instruments for the purposes of assessment and moderation. The correct procedure for completing simulations is outlined below for teachers and school management teams who are responsible for the implementation of the PAT in Electrical Technology. STEP 1: The teacher will choose simulations from the provided examples. STEP 2: Compile a list of the components needed for every simulation. Add extra components as these items are very small and you will need extras, as these items get lost/damaged very easily when learners are working with it. STEP 3: Contact three different electronics component suppliers for comparative quotations. STEP 4: Submit the quotations to the SMT for approval and procurement of the items. STEP 5: Place the components in storage. Collate items for each simulation, thus making it easier to distribute and use during practical sessions. Ensure that different values of components do not mix, as this would lead to components being used incorrectly and this could damage the component and in extreme cases, the equipment used. STEP 6: Copy the relevant simulations and hand them out to learners at the start of the term. Teachers are allowed to adjust circuits and component values to suit their environment/ resource availability. Teachers are required to develop a set of model answers in the teacher's file. Moderators will use the teacher's model answers and artefacts when moderating. 2.7 Projects The projects are construction projects teachers can choose for their learners. These projects are based on proven circuits provided from schools and subject advisors. The projects are based on working prototypes and require careful construction in order for it to operate correctly. Projects are varied in cost and teachers must ensure that the projects chosen fall within the scope of the school's budget. Once the teacher has decided on a circuit, he/she must construct the prototype. Thereafter, copies of the provided circuit can be made and distributed to learners. They MUST redraw these circuits in their file correctly. The description of the operation of the circuits is NOT complete. It is required of learners to interrogate the function of the components in the provided circuit. They should elaborate on the purpose of components in the circuit. It is recommended that those learners investigate similar circuits available on the internet and in the school library or workshop reference books. Copyright reserved Please turn over

Electrical Technology: Electronics Downloaded from hlayiso.com 8 DBE/PAT 2020 NSC 2.8 Working marks sheet (A working Excel file is provided with this PAT) Moderated Mark PAT Mark Sheet Term 1 Term 2 Project Mark out of 100 Total = Design Design Term 1 + Simulation Simulation Simulation Simulation and and Term 2 + 1 2 3 4 Make Make Project Part 1 Part 2 No. Name of Learner 40 40 40 40 70 20 250 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Total Average Teacher Name: Principal Name: Moderator Name: Signature: Signature: Signature: Date: Date:_______________________ Date:__________________ School Stamp Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 9 DBE/PAT 2020 NSC 3. LEARNER GUIDELINES PAT 2020 cover page (Place this page at the front of the PAT.) Department of Basic Education Grade 12 CAPS for Technical High Schools Practical Assessment Task – Electrical Technology Time allowed: Terms 1–3 (2020) Learner Name: Class: School: Specialisation: ELECTRONICS Complete FOUR simulations. Project (Write the name of the project): _____________________________ Evidence of moderation: NOTE: When the learner evidence (LE) selected has been moderated at school level, the table will contain evidence of moderation. Provincial moderators will sign the provincial moderation and only sign if re-moderation is needed. Moderation Signature Date Signature Date School-based Provincial moderation Re-moderation Mark allocation Moderated PAT Component Maximum Mark Learner Mark Mark Simulation 1 40 Simulation 2 40 Simulation 3 40 Simulation 4 40 Design and Make Project – Circuit 70 Design and Make Project – Enclosure 20 Total 250 Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 10 DBE/PAT 2020 NSC 3.1 Instructions to learners  The practical assessment task counts 25% of your final promotion mark.  All work produced by you must be your own effort. Group work and co-operative work is not allowed.  The practical assessment task must be completed over three quarters.  The PAT file must contain 4 simulations and a practical project.  Calculations should be clear and include units. Calculations should be rounded off to TWO digits. SI units should be used.  Circuit diagrams can be hand-drawn or drawn on CAD. No photocopies or scanned files are allowed.  Photos are allowed and can be in colour or greyscale. Scanned photos and photocopies are allowed.  This document must be placed inside your PAT file together with the other evidence.  Learners with identical photos will be penalised and receive zero for that section 3.2 Declaration of Authenticity (COMPULSORY) Declaration: I (Name) herewith declare that the work represented in this evidence is entirely my own effort. I understand that if proven otherwise, my final results may be withheld. _____ Signature of learner _____ Date Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 11 DBE/PAT 2020 NSC 4. SIMULATIONS 4.1 Simulation 1: RLC series circuit Name of learner: Mark Class: Date Completed: _______ 40 Date Assessed: Assessor Signature: ______________ Date Moderated: Moderator Signature: ______________ 4.1.1 PURPOSE:  To build a RLC-series circuit  To measure the total current of a series RLC-circuit over a wide range of frequencies  To display the voltage waveforms across different components and observe the relationships between the voltages 4.1.2 COMPONENT LIST  Any audio transformer (interstage impedance matching transformer found in modems, audio circuits – value is not critical)  0,1 µF capacitor (104)  1kΩ (Brown Black Red 5% – ¼ Watt)  Function generator (Disconnect the earth terminal of the function generator.)  Experiment board  Connecting wires  4 x multimeters  Oscilloscope with two probes (Disconnect the earth terminal of the oscilloscope.) 4.1.3 RLC SERIES CIRCUIT (a) Measure the exact value of following components before connecting the circuit: The exact resistance of R (Will differ slightly from learner to learner): R R= ______________ (1) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 12 DBE/PAT 2020 NSC The exact resistance of L (The resistance of the coil being used): Audio Transformer RL = ______________ (1) (b) Build the circuit diagram in FIGURE 4.1 on your experiment board. You will be assessed using the rubric below. Audio Transformer C = 0,1 µF R = 1 kΩ VL VC VR VT A1 Function Generator 3 V - 8 V / 1,5 kHz FIGURE 4.1 LEVEL DESCRIPTOR MARKS OBTAINED 0 1 2 4 The candidate was The candidate was The candidate was able The candidate not able to able to partially to correctly construct the constructed the circuit construct the construct the circuit circuit with the correctly without the circuit on his own. on his own. assistance of the assistance of the teacher. teacher. The candidate was The cadidate was The candidate The candidate not able to able to partially connected the connected the connect the connect the measuring instruments measuring instruments measuring measuring correctly and measured correctly and instruments. instruments to the the voltages and measured the voltages circuit. currents with the and currents on his assistance of the own. teacher. (8) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 13 DBE/PAT 2020 NSC 4.1.4 PROCEDURE (a) Set the function generator to a sine wave and adjust the voltage to between 3–8 V sine wave. (Set the voltage as high as the frequency generator allows.) NOTE: Once the voltage is set, do NOT change the amplitude of the voltage. Set the frequency. Teachers are requested to change the frequency for each learner. Use frequency intervals in such a manner that each learner has a unique frequency. (Teachers should choose frequencies where the required reaction (reactance) from the circuit is evident. This is dependent on the value of the coil, which is determined by the components chosen.) Write down the frequency assigned to you: f = ____________ NOTE: Do NOT adjust the frequency unless instructed to do so. (b) Connect the multimeters to reflect the following: VL = VC = VR = VT = IT = (Meters must be true RMS meters set to AC to ensure correct readings.) (5) (c) Calculate the total current in the circuit using VR and the measured value of (R+RL). VR = IT x (R+RL) (2) (d) Draw the TWO waveforms displayed on the oscilloscope screen to illustrate the phase relationship between VR and VL . NOTE: Schools that have digital scopes can make screenshots and print the screenshot. Learners may NOT copy from each other. V/Div:___________ (Ch 1) V/Div:___________ (Ch 2) T/Div: ___________ NOTE: 1 mark for each waveform correctly drawn and 1 mark for the oscilloscope settings. (3) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 14 DBE/PAT 2020 NSC (e) Draw the TWO waveforms displayed on the oscilloscope screen to illustrate the phase relationship between VR and VC. V/Div:___________ (Ch 1) V/Div:___________ (Ch 2) T/Div: ___________ NOTE: 1 mark for each waveform correctly drawn and 1 mark for the oscilloscope settings. (3) (f) Calculate the impedance of the circuit (Z). (3) (g) Calculate XC by using the specific frequency assigned to you in QUESTION 4.1.3. (3) (h) Calculate the total reactance X using R and RL: RL = resistance of the inductor measured in QUESTION 4.1.4(b) √ (2) (i) Calculate the inductive reactance (XL) from X and XC. (2) (j) Calculate the inductance of the coil (L) from XL. (3) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 15 DBE/PAT 2020 NSC (k) Tabulate your values in the following table and compare it with the given results: Learner Results VCOIL VC VT VR IT R Z X XL XC L Typical Values VCOIL VC VT VR IT R Z X XL XC L 6,6 V 4,5 V 7,9 V 3,1 V 3,1 mA 1 000 Ω 2 548 Ω - 740 Ω 1 592 Ω 117 mH (l) State whether the frequency of the supply must increase or decrease for the circuit to resonate. Motivate your answer. (2) (m) Explain how the voltages in a RLC series circuit can be leading and lagging. Why is the reference made to the phase shift of the voltages and not current in this instance? (2) 4.1.5 CONCLUSION: In a series AC circuit the current is equal in all components. The voltage across the inductor leads the supply voltage and the voltage across the capacitor lags the supply voltage. TOTAL: 40 Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 16 DBE/PAT 2020 NSC 4.2 Simulation 2: Semiconductors – JFET amplifier and a Darlington pair Name of learner: Mark Class: Date Completed: _______ 40 Date Assessed: Assessor Signature: ___________ Date Moderated: Moderator Signature: ______________ 4.2.1 PURPOSE: Construct an amplifier using a JFET and investigate the advantage of using a Darlington pair compared to a single transistor. Display the input/output waveforms on an oscilloscope. Activity 2A: Construct a circuit using a JFET as an amplifier 4.2.2 REQUIRED RESOURCES: TOOLS/INSTRUMENTS MATERIALS  Analogue/Digital trainer  2 x 1 kΩ resistor  Analogue/Digital oscilloscope  1 x 100  resistor  Function generator  1 x 2M2  resistor  Variable DC power supply  1 x 5k6  resistor  Side cutters  1 x 4k7  resistor  Wire stripper  1 x 220 nF capacitor  Multimeter  1 x 22 F capacitor 32 V  1 x 10 F capacitor 32 V  1 x 2N3819 JFET (2N5459 or 2N5457)  Connecting wires Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 17 DBE/PAT 2020 NSC 4.2.3 PROCEDURE: (a) Build the circuit in FIGURE 4.2 on an experiment board. +12 V R4 C3 5,6 kΩ 10 uF R1 1 kΩ C1 d 1V 220 nF g 1 kHz 2N3819 R2 s Ch1 100 Ω RL 1 kΩ Ch2 R3 CE2 2M2 Ω R5 4k7 Ω d g s 0V FIGURE 4.2: JFET AS AN AMPLIFIER (b) Connect the function generator across R1 and R2 and adjust it to provide a 1 V peak sine wave. (c) Connect channel 1 of the oscilloscope across R2 and draw the waveform on the grid provided to scale. (d) Connect channel 2 of the oscilloscope across the output of the amplifier and draw the waveform on the grid provided to scale. V/Div:___________ (Ch 1) V/Div:___________ (Ch 2) T/Div: ___________ NOTE: 1 mark for each waveform correctly drawn and 1 mark for the oscilloscope settings. (3) (e) Use the oscilloscope settings and determine the peak value of the input and output signals. VIN(peak) = ________________________ VOUT(peak) = ________________________ (2) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 18 DBE/PAT 2020 NSC (f) Calculate the gain of the amplifier. (3) (g) Compare the two waveforms and write a conclusion regarding the circuit. (2) Subtotal: Activity 2A (10) Copyright reserved Please turn over

Electrical Technology: Electronics Downloaded from hlayiso.com 19 DBE/PAT 2020 NSC FACET SHEET 2A: Using a JFET as an amplifier MAXIMUM LEARNER FACET 1 FACET 2 FACET 3 FACET 4 POSSIBLE MARK MARKS Identify components Collect Collect instruments – Collect hand Prepare for the simulation correctly PSU/mini-trainer oscilloscope tools 4/4 = 1 (1) (1) (1) (1) Use side cutters Use wire stripper Use long-nose pliers Hand tools correctly correctly correctly 3/3 = 1 (1) (1) (1) Set supply voltage Set input voltage Check the datasheet Preparation for insertion of correct at +12 V to correctly at 1 V from on the FET 3 components into breadboard +20 V function generator (1) (1) (1) Correct connection on Polarity of JFET Polarity of C2 – Polarity of C3 – Connect 6 nodes breadboard – nodes and correct correct correct 6/2 = 3 correctly (6/2 = 3) polarity (1) (1) (1) Correct setting of the Correct connection of Correct reading of the Connection of instruments oscilloscope the oscilloscope oscilloscope 6/2 = 3 (2) (2) (2) Output phase vs input Output amplified Circuit is working correctly phase 2 (1) (1) Cleaning the working Placing tools back to area after the Housekeeping their places after work 2/2 = 1 experiment (1) (1) Observing safety Observing safety after before being Safety being reminded 2/2 = 1 reminded (1) (2) TOTAL 15 Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 20 DBE/PAT 2020 NSC Activity 2B: Using a Darlington pair as a current amplifier 4.2.4 REQUIRED RESOURCES: TOOLS/INSTRUMENTS MATERIALS  Analogue/Digital trainer  2 x BC 109 NPN transistors  Analogue/Digital oscilloscope  1 x LED  Function generator  1 x 560 Ω resistor  Variable DC power supply  1 x 100 kΩ resistor  Side cutters  Connecting wires  Wire stripper 4.2.5 PROCEDURE: (a) Construct the circuit in FIGURE 4.3 on an experiment board. FIGURE 4.3 TRANSISTOR CIRCUIT (b) Use your finger as a pathway for the current to connect points X and Y. Once your finger is connected, observe the brightness of the LED and record your findings. (1) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 21 DBE/PAT 2020 NSC (c) Replace the single transistor with two identical BC109 transistors, as indicated in FIGURE 4.4. FIGURE 4.4: DARLINGTON PAIR (d) Connect points X and Y with your finger. Write down your observation of the brightness of the LED (1) (e) Compare the brightness of the LED when one transistor was used and when two transistors were used. Motivate why this is observed. (3) (5) Copyright reserved Please turn over

Electrical Technology: Electronics Downloaded from hlayiso.com 22 DBE/PAT 2020 NSC FACET SHEET 2B: Using a Darlington pair as a current amplifier MAXIMUM LEARNER FACET 1 FACET 2 FACET 3 FACET 4 MARKS MARK Identify components Collect PSU/ Collect instruments Collect hand Prepare for the simulation correctly mini-trainer – multimeter tools 4/2 = 2 (1) (1) (1) (1) Use side cutters correctly Use wire stripper correctly Hand tools 2/2 = 1 (1) (1) Check the datasheet on Preparation for insertion of Set supply voltage correct the transistor and the components into at +9 V 2/2 = 1 Darlington pair breadboard (1) (1) Correct connection on Polarity of TR1 and TR2 Polarity of LED – Connect 6 nodes correctly breadboard – nodes and correct correct 6/2 = 3 (6/2 = 3) polarity (2) (1) 1 transistor 2 transistors Circuit is working correctly Brightness of LED – dim Brightness of LED – bright 2/2 = 1 (1) (1) Cleaning the working area Placing tools back to their Housekeeping after the experiment places after work 2/2 = 1 (1) (1) Observing safety before Observing safety after Safety being reminded being reminded 2/2 = 1 (1) (1) TOTAL 10 Subtotal: Activity 2A (10) Subtotal: Facet sheet 2A (15) Subtotal: Activity 2B (5) Subtotal: Facet sheet 2B (10) TOTAL SIMULATION 2 [40] Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 23 DBE/PAT 2020 NSC 4.3 Simulation 3: Switching circuits – 741 bistable multivibrator and 555 astable multivibrator Name of learner: Mark Class: Date Completed: _______ 40 Date Assessed: Assessor Signature: ______________ Date Moderated: Moderator Signature: ______________ Simulation 3A: 741 bistable multivibrator 4.3.1 PURPOSE:  To study the 741 bistable multivibrator as a practical circuit  To build a bistable multivibrator with the 741 op amp  To compare the theory learned in class with the actual circuit 4.3.2 REQUIRED RESOURCES: TOOLS/INSTRUMENTS MATERIALS  Experiment board  1 x 741 op-amp DIP8  Voltmeter  1 x 560 Ω resistor  Dual power supply 9V 0 –9V  3 x 1 kΩ resistors  Side cutters  2 x 470 Ω resistors  Long-nose pliers  1 x 10 µF capacitor  Wire stripper  1 x red LED  1 x green LED  2 x push button/tactile switches  Connecting wires Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 24 DBE/PAT 2020 NSC 4.3.3 PROCEDURE: (a) Build the circuit diagram in FIGURE 4.5 on your experiment board. +9 V SW 1 C1 10 uF 2 7 R3 6 1 kΩ 741 3 4 RF R2 1 kΩ 470 Ω R5 R4 1 kΩ 560 Ω LED2 R1 Green SW 2 470 Ω LED1 -9 V Red FIGURE 4.5: 741 BISTABLE MULTIVIBRATOR (b) After the teacher has checked, switch on the circuit by pressing the switch (SW 1). Connect channel 1 of the oscilloscope to pin 2 of the 741 IC. Connect channel 2 of the oscilloscope to pin 6 of the 741 IC. Set the T/div setting to 1s/div and answer the questions that follow. Take note of the polarity of the input pulses, output signal and which LED is ON. (c) Press switches S1 and S2 respectively. Write down the polarity of the input pulses and output when the switches are pressed. POLARITY OF INPUT PULSE POLARITY OF OUTPUT SIGNAL S1 S2 (4) (d) Which LED is ON when S1 is pressed? Motivate why. (3) (e) Explain why this circuit is known as a bistable multivibrator. Refer to the input signals, its polarity, the output signal and the time that the circuit remains in each state. (5) Subtotal: Activity 3A (12) Copyright reserved Please turn over

Electrical Technology: Electronics Downloaded from hlayiso.com 25 DBE/PAT 2020 NSC FACET SHEET 3A: 741 bistable multivibrator MAXIMUM LEARNER FACET 1 FACET 2 FACET 3 FACET 4 POSSIBLE MARK MARKS Identify components Collect PSU/ Collect instruments – Collect hand tools Prepare for the simulation correctly mini-trainer multimeter 4/2 = 2 (1) (1) (1) (1) Use long-nose pliers Use wire stripper Use side cutters correctly Hand tools correctly correctly 3/3 = 1 (1) (1) (1) Set supply voltage Preparation for insertion of Check the pin out of the correctly at components into 741 IC 2/2 = 1 +9V 0V –9V breadboard (1) (1) Polarity and Correct connection on Correct connection of Polarity of both LEDs connection of breadboard – nodes and 741 IC to supply – correct 6 switches correct polarity (2) (2) (2) S1 is pressed – S2 is pressed – Circuit is working correctly LED 1 (red) ON LED 2 (green) ON 2/2 = 1 (1) (1) Placing tools back to Cleaning the working their places after Housekeeping area after the experiment 2/2 = 1 work (1) (1) Observing safety before Observing safety Safety being reminded after being reminded 2/2 = 1 (1) (1) Subtotal: FACET 3A 13 Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 26 DBE/PAT 2020 NSC Simulation 3B: 555 IC astable multivibrator 4.3.4 PURPOSE: Construct a simple circuit using the 555 IC to build a clock pulse generator (astable multivibrator) and display output waveforms on an oscilloscope. 4.3.5 REQUIRED RESOURCES: TOOLS/INSTRUMENTS MATERIALS  Analogue/Digital trainer  1 x 555 timer IC  Analogue/Digital oscilloscope  1 x 220 Ω resistor  Function generator  1 x LED  Variable DC power supply  1 x 10 nF capacitor  Side cutters  1 x 10 KΩ resistor  Wire stripper  1 x 100 KΩ pre-set pot  1 x 10 µF (electrolytic capacitor 16 V)  Connecting wires 4.3.6 PROCEDURE: (a) Construct the circuit as in FIGURE 4.6 on the breadboard. Connect channel 1 of the oscilloscope across C1. Connect channel 2 of the oscilloscope to pin 3 of the 555 IC. Switch ON the circuit and observe. Answer the questions that follow. +9V R1 10K 8 4 7 V+ RST DISCHARGE VR1 3 6 100K THR 555 OUT 2 TRIGGER GND 1 5 R2 470E SCOPE SCOPE CH2 CH1 C1 D 10µF SCOPE CH1 -9V FIGURE 4.6: 555 IC ASTABLE MULTIVIBRATOR Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 27 DBE/PAT 2020 NSC (b) Draw the output waveform observed on the oscilloscope on the grid provided. V/Div:___________ (Ch 1) V/Div:___________ (Ch 2) T/Div: ___________ NOTE: 1 mark for each waveform correctly drawn and 1 mark for the oscilloscope settings. (3) (c) List the components responsible for the frequency of the output. (3) SIMULATION 3B RUBRIC 1 2 3 Learner was able to construct Learner was able to construct Learner was able to construct a minimum part of the circuit a part of the circuit correctly the whole circuit correctly correctly with assistance without assistance without assistance Learner failed to get the Learner was able to set the Learner was able to set the output wave on the oscilloscope and managed to oscilloscope and managed to oscilloscope get the output wave after the get the output wave without assistance from the teacher the assistance of the teacher Learner did not do any Learner did housekeeping Learner did housekeeping housekeeping duties after being reminded without being reminded (9) (15) Subtotal: Activity 3A (12) Subtotal: Facet sheet 3A (13) Subtotal: Activity 3B (15) TOTAL SIMULATION 3 [40] Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 28 DBE/PAT 2020 NSC This simulation is an alternative OPTION to do in the place of Simulation 3A. Simulation 3C: 741 op amp as a non-inverting amplifier 4.3.7 PURPOSE: To construct a simple circuit using the 741 op amp to build a non-inverting amplifier and display the input/output waveforms on an oscilloscope Activity 3C: Construct a circuit using the 741 op amp 4.3.8 REQUIRED RESOURCES: TOOLS/INSTRUMENTS MATERIALS  Analogue/Digital trainer  1 x LM741 IC  Analogue/Digital oscilloscope  2 x 1 kΩ resistor  Function generator  2 x 10 kΩ resistor  Dual power supply 9V 0 –9V  1 x 5 kΩ resistor  Side cutters  Connecting wires  Wire stripper 4.3.9 PROCEDURE: (a) Construct the circuit as in FIGURE 4.7 on the breadboard. Set the function generator to give a sine wave output of 1 V peak at a frequency of 1 000 Hz (1 kHz). Connect channel 1 of the oscilloscope to pin 3 of the 741 IC. Connect channel 2 of the oscilloscope across RL (pin 6). FIGURE 4.7: NON INVERTING AMPLIFIER Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 29 DBE/PAT 2020 NSC (b) Switch ON the power to the circuit and observe the input and output waveforms. Draw the input and output waveforms observed on the oscilloscope on the grid provided. V/Div:___________ (Ch 1) V/Div:___________ (Ch 2) T/Div: ___________ NOTE: 1 mark for each waveform correctly drawn and 1 mark for the oscilloscope settings. (3) (c) Calculate the gain of the amplifier using the resistor values given. (3) (d) Measure the voltages across R1, Rf and RL: VR1 = VRf = VRL = (3) (e) Replace Rf with a 5 kΩ resistor and measure the voltages across R1, Rf and RL: VR1 = VRf = VRL = (3) (f) How did this change affect the output of the amplifier? Motivate your answer. (3) (15) Copyright reserved Please turn over

Electrical Technology: Electronics Downloaded from hlayiso.com 30 DBE/PAT 2020 NSC FACET SHEET 3C: 741 non-inverting op amp MAXIMUM LEARNER FACET 1 FACET 2 FACET 3 FACET 4 POSSIBLE MARK MARKS Identify the components Collect PSU/ Collect instruments Collect hand tools Prepare for the simulation correctly mini-trainer – multimeter 4/2 = 2 (1) (1) (1) (1) Use long-nose pliers Use wire stripper Use side cutters correctly Hand tools correctly correctly 3/3 = 1 (1) (1) (1) Set supply voltage Preparation for insertion of Check the pinout of the correctly at components into 741 IC 2/2 = 1 +9V 0V –9V breadboard (1) (1) Correct connection on Correct connection of 741 Measurement across breadboard – nodes and IC to supply R1, RF and RL 3 polarity (2) (1) Vout is not inverted Vout is not inverted with with Circuit is working correctly RF = 10 kΩ 2/2 = 1 RF = 5 kΩ (1) (1) Cleaning the working Placing tools back to Housekeeping area after the experiment their places after work 2/2 = 1 (1) (1) Observing safety before Observing safety after Safety being reminded being reminded 2/2 = 1 (1) (1) TOTAL 10 Subtotal: Activity 3C (15) Subtotal: Facet sheet 3C (10) Subtotal: Activity 3B (15) TOTAL SIMULATION 3 [40] Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 31 DBE/PAT 2020 NSC 4.4 Simulation 4: 741 op-amp Schmidt trigger and summing amplifier circuit Name of learner: Mark Class: Date Completed: _______ 40 Date Assessed: Assessor Signature: ______________ Date Moderated: Moderator Signature: ______________ 4.4.1 PURPOSE: To construct a simple circuit using a 741 op amp to build a Schmidt trigger circuit and a summing amplifier circuit and display the output waveforms on an oscilloscope Activity 4A: Construct a Schmidt trigger circuit using the 741 op amp 4.4.2 REQUIRED RESOURCES: TOOLS/INSTRUMENTS MATERIALS  Analogue/Digital trainer  1 x LM741 op amp  Analogue/Digital oscilloscope  2 x 10 KΩ resistors  Function generator  3 x 1k resistors  Variable DC power supply  1 x 2k2  resistor (pre-set pot)  Side cutters  1 x 100 k resistor  Wire stripper  1 x 1M   1 x LED  Connecting wires Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 32 DBE/PAT 2020 NSC 4.4.3 PROCEDURE: (a) Construct the circuit as in FIGURE 4.8 on the breadboard. +9V Note that the scope R1 1K must be set to DC. VR1 2 7 - 2K2 6 741 3 + CH 2 4 R3 470E R2 1K -9V Rf 100K D1 R Hysteresis CH 1 Resistor FIGURE 4.8 Learner was able to Learner was able to Learner was able to construct a minimum part of construct a part of the circuit construct the circuit correctly the circuit correctly without correctly without assistance without assistance assistance 1 3 4 (4) (b) Adjust the potentiometer, while observing the output voltage. The output switches to HIGH when Vin is ________V and to LOW when Vin is________V. The hysteresis is _______V. (3) (c) Replace the 100 k resistor with a 10 k resistor. Adjust the input potentiometer slowly and observe the LED. State what happens to the brightness of the LED when the hysteresis resistor is changed from 100 K to 10 K. (1) (d) Refer to (c) above. The output now switches to HIGH when the input voltage is ______V and to LOW at ________V. The hysteresis is ________V. (3) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 33 DBE/PAT 2020 NSC (e) Replace the hysteresis resistor with 1 MΩ resistor. The output now switches to HIGH at ________V and to LOW at ______ V. The hysteresis is ________V. (3) (f) Remove the hysteresis resistor and adjust the potentiometer slowly. Write down your observation with regard to the LED (1) (g) Learner did not do any Learner did housekeeping Learner did housekeeping housekeeping duties after being reminded without being reminded 1 2 4 (4) 4.4.4 CONCLUSION: (2) Subtotal: Activity 4A (21) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 34 DBE/PAT 2020 NSC Activity 4B: Construct a summing amplifier circuit using the 741 op amp 4.4.5 REQUIRED RESOURCES: TOOLS/INSTRUMENTS MATERIALS  Analogue/Digital trainer  6 x 1k  resistors  Analogue/Digital oscilloscope  4 x 10 k resistors  Function generator  1 x 2k7  resistor  Variable DC power supply  3 x 2k2  variable pots  Side cutters  1 x LM 741 IC  Wire stripper  Connecting wires 4.4.6 PROCEDURE: (a) Construct the circuit as in FIGURE 4.9 on the breadboard. Learner was able to Learner was able to Learner was able to construct a minimum part construct a part of the construct the circuit of the circuit correctly circuit correctly without correctly without without assistance assistance assistance 2 3 5 (5) +9V R1 R2 R2 1K 1K 1K R7 VR3 2K2 10K R8 R10 VR2 2K2 10K 10K R9 VR1 2 7 2K2 - 10K 741 6 3 + 4 R2 R4 R6 1K 1K 1K Rf -9V R3 V 470E 100K Hysteresis Resistor R FIGURE 4.9 Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 35 DBE/PAT 2020 NSC (b) Use the 2k2 pots to set V1, V2 and V3 to the voltages as indicated in the table below. Measure the output values and populate the table below. V1 + V2 + V3 = Vout 3 + 2.5 + 1.75 = 1.5 + -4 + 2.2 = 5 + -4.5 + 1 = -4 + 1.5 + 2.5 = -1.5 + -2.25 + -3.25 = (5) 4.4.7 CONCLUSION: (5) Learner did not do any Learner did housekeeping Learner did housekeeping without housekeeping duties after being reminded being reminded 1 2 4 (4) Subtotal: Activity 4B (19) Subtotal: Activity 4A (21) Subtotal: Activity 4B (19) TOTAL SIMULATION 4 [40] Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 36 DBE/PAT 2020 NSC 4.5 Simulation 5: Colpitts oscillator Name of learner: Mark Class: Date Completed: _______ 40 Date Assessed: Assessor Signature: ______________ Date Moderated: Moderator Signature: ______________ 4.5.1 PURPOSE: Construction of the Colpitts oscillator circuit using discreet components and displaying the input/output waveforms on an oscilloscope 4.5.2 RESOURCES: ALTERNATIVE TOOLS/INSTRUMENTS MATERIALS VALUES  Analogue/Digital trainer  1 x 2N22905 transistor  BC 182  Analogue/Digital  1 x 470 KΩ resistor  150 KΩ oscilloscope  1 x 680 Ω resistor  2 KΩ  Function generator  1 x 2,2 KΩ resistor  Multimeter  2 x 0,1 µF capacitor  100 µF  Variable DC power  1 x 47 µF capacitor  470 pF supply  1 x 0,1 µF capacitor  100 pF  Side cutters  2 x 47 nF capacitor  200 pF  Wire stripper  1 x 0,47 µF capacitor  200 pF  Long-nose pliers  1 x 10 mH inductor  Interstage  Connecting wire transformer  12 V DC supply  9 V DC Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 37 DBE/PAT 2020 NSC 4.5.3 PROCEDURE: (a) Build the circuit in FIGURE 4.10 on the breadboard. R1=470KΩ RC=2.2KΩ 12V C4=47nF PNP2N22905 C3=0.1µF C1=0,1 µF R2=680Ω L=10mH C5=0.47µF C2=47nF FIGURE 4.10 (b) Switch ON the circuit. Draw the output of the oscillator on the grid provided. V/Div:___________ (Ch 1) V/Div:___________ (Ch 2) T/Div: ___________ NOTE: 1 mark for each waveform correctly drawn and 1 mark for the oscilloscope settings. (3) (c) Measure and record the following DC voltages: VR1 = (2) VR2 = (2) VBE = (2) VCE = (2) VRC = (2) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 38 DBE/PAT 2020 NSC (d) Connect the oscilloscope, measure and record the resonant frequency: ___________________kHz (2) (e) Calculate the theoretical resonant frequency. (3) (f) Replace capacitors C1 and C2 with C1 = 470 pF and C2 = 1 000 pF respectively. Measure and record the oscillations frequency: (2) (g) Calculate the oscillation frequency: (3) (h) State the function of RC in the circuit: (2) Copyright reserved Please turn over

Electrical Technology: Electronics Downloaded from hlayiso.com 39 DBE/PAT 2020 NSC FACET SHEET 5B: Colpitts oscillator MAXIMUM LEARNER FACET 1 FACET 2 FACET 3 FACET 4 POSSIBLE MARK MARKS Identify components Collect instruments – Collect hand Collect PSU/mini-trainer Prepare for the simulation correctly multimeter tools 4/2 = 2 (1) (1) (1) (1) Use side cutters Use long-nose pliers Use wire stripper Hand tools correctly correctly correctly 3/3 = 1 (1) (1) (1) Refer to datasheet for Set supply voltage Preparation for insertion of pinout correctly at 12 V 2 components into breadboard (1) (1) Correct connection on Correct connection Voltage measurement Correct polarity of supply breadboard – nodes and transistor across components 6 (1) polarity (2) (3) Oscillation frequency at Circuit is working correctly output sine wave 2 (2) Cleaning the working Placing tools back to their area after the Housekeeping places after work 2/2 = 1 experiment (1) (1) Observing safety before Observing safety after Safety being reminded being reminded 2/2 = 1 (1) (1) TOTAL 15 Subtotal: Activity 5A (25) Subtotal: Facet sheet 5B (15) TOTAL SIMULATION 5 [40] Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 40 DBE/PAT 2020 NSC 5. SECTION B – DESIGN AND MAKE Design and Make Project Time: January to August 2020 Learner Name: School: Class: Title/Type of Project: _____ INSTRUCTIONS  This section is COMPULSORY for all learners.  The teacher will choose a circuit for the project.  Any project constructed must include at least (but is not limited to): o No less than SEVEN components o A variety of components (both active and passive) o PCB making in some form o Soldering o An enclosure with a switch and protection  The checklist on the next page must be used to ensure that all the required tasks for the PAT have been completed. PAT CHECKLIST NOTE: The learner MUST complete this checklist for the teacher BEFORE marking of that section takes place. NO. DESCRIPTION TICK () NO YES Design and Make: Part 1 1. Circuit diagram drawn   2. Circuit description filled in   3. Component list completed   4. Tools list for circuitry populated   5. Measuring instrument list filled in   6. Evidence of prototyping printed and pasted into the file   7. Learner's own Veroboard/PCB planning/design printed and included in file   Design and Make: Part 2 1. Enclosure design completed and included in the file   2. Unique name written down and on the enclosure   3. Logo designed and placed on the enclosure   Miscellaneous 1. Enclosure included in the project   2. Enclosure prepared and drilled according to the design   3. Enclosure finished off and completed with name and logo   4. PCB securely mounted in the enclosure using acceptable techniques   5. Circuit inside the enclosure is accessible   6. Internal wiring neat and ready for inspection   7. File and project completed and ready for moderation at the workshop/room   Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 41 DBE/PAT 2020 NSC 5.1 Design and Make: Part 1 5.1.1 Circuit diagram Draw a circuit diagram of your project and add it after this page. 5.1.2 Project: Description of operation Use the space below to provide an overview of how the project functions. Use your own words and do some research of your own. Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 42 DBE/PAT 2020 NSC 5.1.3 Component list Draw up a list of components you will need from the circuit diagram. LABEL DESCRIPTION AND VALUE QUANTITY 5.1.4 Tools/Instrument list Draw up a list of tools you will need to complete the PAT circuitry. You may add to the list as you proceed through the PAT. DESCRIPTION PURPOSE/USE 5.1.5 Evidence of prototyping Take photographs of the working prototype on the breadboard using a digital camera or cellphone and insert here. Add your name on the photograph. Add the pictures after this page. 5.1.6 PCB design Design a circuit board layout for the circuit you are going to build. Print it out and attach after this page. Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 43 DBE/PAT 2020 NSC 5.2 Assessment of the Design and Make phase: Part 1 Achieved =  Mark Not achieved =  NO. FACET DESCRIPTION Circuit Diagram 1. The circuit diagram was drawn using EGD equipment. 1 2. The circuit diagram was drawn using CAD/any electronic 1 design software. 3. The circuit diagram was drawn using correct symbols. 1 4. The circuit diagram has all labels – R1, C1, Tr1, etc. 1 5. The circuit diagram has all component values –100 Ω, 1 220 μF, etc. 6. The circuit diagram has a name/title. 1 7. The circuit diagram has a frame and title block. 1 (EGD approach) Component List 8. Labels correlate with circuit diagram. 1 9. Description and values correlate with circuit diagram. 1 10. Quantities are correct. 1 Description of Operation 11. Basic function of the circuit is described correctly. 1 12. All subcircuits in the circuit diagram and component list are 1 included in the description. 13. Purposes of subcircuits in the circuit diagram are described 1 correctly. 14. Learner used own interpretation and did not copy from 1 another source verbatim. 15. Sources are acknowledged. 1 Tools/Instrument List 16. The tools/instrument list has been completed. 1 17. The tools/instruments listed all have a purpose for being used. 1 Evidence of Prototyping on Breadboard 18. Unique, original photos of the prototyping are included. 1 19. Unique, original photos include the learner name. 1 20. Photos are clear and in focus: 1 All components are clearly identifiable. 21. Prototype is operational. No photo, no mark. 2 PCB Design 22. Printed circuit board design is included in the PAT file. 1 23. PCB design is made using a CAD approach. 3 24. Component overlay showing placement is included. 1 25. Components are labelled the same as in the circuit diagram. 1 26. The design is original and does not match any other learner's 1 design. 27. Board layout (tracks/current flow) is functional and matches 1 the original circuit diagram. Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 44 DBE/PAT 2020 NSC Achieved =  Mark Not achieved =  NO. FACET DESCRIPTION Circuit Board Manufacturing 28. Circuit board is etched neatly according to the PCB design. 5 29. The learner's name is etched onto the circuit design. 1 30. The PCB is tinned neatly. 1 31. The soldered PCB, solder side, is covered with a clear 1 protective coating. (Plastic 70/clear lacquer) 32. Holes are drilled neatly and are aligned in the middle of the 1 pads on the PCB. 33. Mounting holes of the PCB are drilled symmetrically. 1 34. All burrs are removed. 1 35. The PCB is cut neatly/squarely and edges are filed neatly. 1 36. Axial and radial components are placed neatly and flush with 1 the board. 37. Component orientation are aligned between similar 1 components (e.g. the gold band of all resistors are placed on the same side). 38. Soldered components – leads are cut off, flush and neat on 2 the solder side. 39. More than 60% of the solder joints are shiny (not dry joints). 2 40. Wire insulation is stripped to the correct length (no extra 2 copper showing). 41. Wiring is long enough to allow for dismantling and inspection. 1 42. Wiring is wrapped neatly. 1 43. A power switch is included and fitted to the enclosure. 2 44. A fuse/protection is included and fitted correctly where 2 applicable. 45. Wiring entering/exiting the enclosure is provided with a 2 grommet/applicable fittings/sockets where applicable. 46. Batteries are mounted using a battery housing/mounting 1 bracket and battery clip (NO double-sided tape). 47. The project has a pilot light/LED installed in the enclosure 1 showing when the circuit is operational. (Switch is on – must go out when fuse is blown.) 48. The project is fully operational and commissioned/installed in 10 the enclosure. TOTAL (PART 1 = 70 marks) NOTE: In projects where facets are not applicable, the projects should be marked, and the totals adjusted accordingly. Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 45 DBE/PAT 2020 NSC 5.3 Design and Make: Part 2 5.3.1 Enclosure design  Design an enclosure for your project.  NO FREEHAND DRAWINGS.  Draw using EGD equipment OR use a CAD program.  Draw in first-angle orthographic projection.  Add your drawings after this page.  Use colour to enhance your drawing. 5.3.2 Manufacture the enclosure neatly according to your design. You may use pre-cut panels from metal, wood, Perspex/Plexiglas, etc. You must, however, construct/assemble these parts. Injection-molded enclosures are also acceptable. It is important that your enclosure and the placement of the parts align with your design. 5.3.3 Choose a name for your device. Write down the name of the device below. _________________________________________________________________ 5.3.4 Design a unique logo for your device, as well as a specification plate, and attach it after this page. [20] Copyright reserved Please turn over

Electrical Technology: Electronics Downloaded from hlayiso.com 46 DBE/PAT 2020 NSC 5.4 Assessment of the Design and Make phase: Part 2 Achieved = 1 Mark NO. FACET DESCRIPTION Not achieved =  Enclosure Desig 1. Enclosure design is included in first-angle orthographic projection. 1 2. Drawn design includes a title box and page border. 1 3. Isometric drawing included additionally. 1 4. Dimensions are included. 1 5. The name of the device is written in the PAT document. 1 6. The logo design and specification plate design is in the PAT document. 2 Subtotal (7 marks max.) Enclosure Manufacturing 7. Enclosure matches the design. 1 – Dimensions and placement correlate. 8. Name of the device is attached on the enclosure. 1 9. The logo design is attached on the enclosure. 1 10. The logo design on the enclosure is durable and not merely a paper pasted on the enclosure (painted/used decoupage/ 1 screen printed/sublimation printed). 11. The enclosure is manufactured from scratch/pre-cut parts. 3 Does NOT include: cardboard, paper, margarine container Does include: sheet metal, Perspex, Plexiglas, wood, glass and other raw materials, injection-moulded plastic boxes 12. Holes/Cut-outs in the enclosure are made with the appropriate tools. 2 13. Specification plate with the learner's name, operating voltage, fuse rating and additional information on the project. 1 14. Enclosure is neatly prepped, painted and aesthetically pleasing. 2 15. The circuit board is mounted using appropriate methods inside the enclosure. (NO double-sided tape, Prestik, glue, 1 chewing gum, masking tape, etc.) Subtotal (13 marks max.) TOTAL (PART 2 = 20 marks) Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 47 DBE/PAT 2020 NSC 6. PROJECTS 6.1 PRACTICAL PROJECT 1: 5 Watt mini-amplifier (portable speaker) This micro-sized high quality amplifier was originally designed to replace amplifiers in car radios where the original ICs are no longer available. This does not limit the use to that application. Use your imagination: There are a million other uses. Always use an adequate heat sink. THE CIRCUIT The TDA 2002 or TDA 2003 is used in a very straight forward audio amplifier configuration and only a few precautions must be taken when using it. Firstly, because of the very high input impedance, the input connections must be screened cables and kept as short as possible, to eliminate pickup of stray radio frequency and other interference. Secondly, the fact that the PCB is so small limits the amount of decoupling capacitance (C5) that can be provided on the board. If the supply does not have at least a few hundred microfarads smoothing, then the amplifier could go into oscillation, and that means you have to place, e.g., an 1 000 µF 16 V capacitor over the supply voltage Tips on construction: No problems should be experienced when assembling this amplifier. Just check for the polarity of the electrolytic capacitors and make sure that the soldering is done properly. Care must also be taken when connecting the power to the PCB. NOTE: IF THE POLARITY IS REVERSED, THE IC WILL BE DESTROYED. COMPONENT LIST: R1 Can be replaced with a 100K preset if required R1 100K 1/4W resistor Brown Black Yellow Gold 1 R2 47 OHM 1/4W resistor Yellow Violet Black Gold 1 R3 220 OHM 1/4W resistor Red Red Brown Gold 1 R4 2,2 OHM 1/4W resistor Red Red Gold 1 R5 22 OHM 1/4W resistor Red Red Black Gold 1 C1 10 uF 16V electrolytic radial capacitor 1 C2 33 pF non-polarised ceramic capacitor 1 C3 100 uF 16 V electrolytic radial capacitor 1 C4 47 nF non-polarised capacitor (473; 0,047 uF) 1 C5 10 uF 16 V electrolytic radial capacitor 1 C6 470 uF 16 V electrolytic radial capacitor 1 C7 100 nF non-polarised capacitor (104; 0,1 uF) 1 IC1 TDA 2002 OR TDA 2003 Sound IC 1 PP3 9 V Battery Clip 1 10 cm mono-screened cable for Signal IN Connection 1 PCB EFK # 1002 1 Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 48 DBE/PAT 2020 NSC RESOURCES: TOOLS AND EQUIPMENT  Oscilloscope (analogue/digital)  Analogue/Digital trainer with dual power supply  Multimeter  Side cutters  Wire stripper  Soldering iron  Helping hands  PCB etching tank or similar  Solder sucker CIRCUIT DIAGRAM: BATT +V + C5 10 µF 16 V C1 10 µF 16 V GND C6 Signal + 1 5 470 µF 16 V + 4 2 + - 3 TDA2002V GND R3 220 Ω C4 R2 47 nF 47 Ω R1 C2 C7 100 kΩ 33 pF 100 nF + LS1 + - C3 R4 R5 100 µF 16 V 2,2 Ω 22 Ω Signal GND BATT -V 5 WATT MINI AMPLIFIER GND OR Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 49 DBE/PAT 2020 NSC 6.2 PRACTICAL PROJECT 2 (ELECTRONICS): Traffic light RESOURCES: TOOLS MATERIALS  Oscilloscope (analogue/digital)  100 k Ω resistor  Analog/Digital trainer with dual  220 Ω resistor x 3 power supply  22 k Ω resistor x1  Electronics multimeter  LED green x1  Side cutters  LED yellow x 1  Wire stripper  LED red x 1  Soldering Iron  1 µ F capacitor x 2  Helping hands  10 µF capacitor x 1  PCB etching tank or similar  470 k Ω variable resistor x 1  Solder sucker  IC NE555  IC CD 4017  1N4007 Diode x6  PCB 150 x 100 mm  Solder  PCB etching chemicals CIRCUIT DIAGRAM: TRAFFIC LIGHT CIRCUIT 1mF 100K 1mF 8 4 16 7 470K NE 555 3 14 CD 4017 15 22K 6 2 1 5 6 9 11 10 1 2 3 4 7 10mF 220Ω 220Ω 220Ω GREEN YELLOW RED OR Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 50 DBE/PAT 2020 NSC 6.3 PRACTICAL PROJECT 3: Line-following buggy The line-following buggy will follow a black line drawn on white paper by TWO photo interrupters. Create different routes with black electric tape or a black marker for your line- tracking robot. The buggy operates using an IR sensor. The IR diode transmits a signal when a black line is encountered. The signal is fed to the IC chip that stops or starts each motor, alternatively switching ON and OFF motor 1 and 2 to alter the buggy's direction. C3 C2 SW 1 R14 47 µF 0,1 µF SPST 120 kΩ R9 R8 10 V 330 kΩ DC 330 kΩ 4.5 V Q1 U1-B R17 8550D 6 100 Ω D2 1 7 1N4007 CDS-R3 CDS-R4 LM339 R7 Q2 D4 M2 30 Ω U1-A R18 1N4007 + Servo 8550D 4 100 Ω A 2 D1 5 1N4007 LM339 CDS-R1 CDS-R2 R10 91 kΩ R11 Q3 10 kΩ 8550D R12 120 kΩ U1-C R16 8 U1-D 120 kΩ 14 10 D3 M1 L3 L2 9 13 + Red Red LM339 1N4007 Servo 11 A LM339 R6 R5 100 Ω C1 30 Ω R13 R15 10 µF 120 kΩ 120 kΩ 50 V L4 L1 Red Yellow RESOURCES: NO. POSITION ITEM DESCRIPTION QTY 1. R5, R7 Resistor 30 Ω 1/8 W 5% 2 2. R6, 17, 18 Resistor 100 Ω 1/8 W 5% 3 3. R8, R9 Resistor 330 kΩ 1/8 W 5% 2 4. R10 Resistor 91 kΩ 1/4 W 5% 1 5. R11 Resistor 10 kΩ 1/4 W 5% 1 6. R12, 13, 14, 15, 16 Resistor 120 kΩ 1/4 W 5% 5 R1/CDS, R2/CDS, R3/CDS, 7. Photo sensor WJ5800D 4 R4/CDS 8. C3 Electrolytic capacitor 47 µF/16 V 1 9. C1 Electrolytic capacitor 10 µF/16 V 1 10. C2 Ceramic capacitor 104/50 V 1 11. D1, 2, 3, 4 Diode 1N4007 ¼ W 4 12. S1 Slide switch SK-12f1406(1p2t) H = 8 mm 1 13. BH-3V Battery holder AA x 2: 58 x 34 mm 1 14. L1 LED 5 mm yellow diffuse LED 1 15. L2, 3, 4, LED 5 mm red diffuse LED 3 16. Q1, 2, 3 Transistor S8550D TO-92 3 17. U1 IC LM339N 1 18. Gear box Gear box 1 19. Metal wheel Metal wheel 4 direction 2 20. Plastic wheel Plastic wheel R = 37 mm 1 21. M1, M2 Servo motor Servo motor 2 Copyright reserved Please turn over

Downloaded from hlayiso.com Electrical Technology: Electronics 51 DBE/PAT 2020 NSC 7. CONCLUSION On completion of the practical assessment task learners should be able to demonstrate their understanding of the industry, enhance their knowledge, skills, values and reasoning abilities as well as establish connections to life outside the classroom and address real-world challenges. The PAT furthermore develops learners' life skills and provides opportunities for learners to engage in their own learning. Copyright reserved