Electrical Technology Grade 12 NSC November 2025 QP (Eng)

Confidential GRAAD 12 NATIONAL SENIOR CERTIFICATE GRADE 12 ELECTRICAL TECHNOLOGY: ELECTRONICS NOVEMBER 2025 MARKS: 200 TIME: 3 hours This question paper consists of 25 pages, a 2-page formula sheet and a 6-page answer sheet. Copyright reserved Please turn over

Electrical Technology: Electronics 2 DBE/November 2025 NSC Confidential INSTRUCTIONS AND INFORMATION 1. This question paper consists of SIX questions. 2. Answer ALL the questions. 3. Answer the following questions on the attached ANSWER SHEETS: QUESTIONS 4.2, 4.5 and 4.11 QUESTIONS 5.2.3, 5.3.2, 5.3.4 and 5.4.4 QUESTION 6.3.5 4. Write your centre number and examination number on every ANSWER SHEET and hand them in with your ANSWER BOOK, whether you have used them or not. 5. Sketches and diagrams must be large, neat and FULLY LABELLED. 6. Show ALL calculations and round off answers correctly to TWO decimal places. 7. Number the answers correctly according to the numbering system used in this question paper. 8. You may use a non-programmable calculator. 9. Calculations must include: 9.1 Formulae and manipulations where needed 9.2 Correct replacement of values 9.3 Correct answer and relevant units where applicable 10. A formula sheet is attached at the end of this question paper. 11. Write neatly and legibly. Copyright reserved Please turn over

Electrical Technology: Electronics 3 DBE/November 2025 NSC Confidential QUESTION 1: MULTIPLE-CHOICE QUESTIONS 2025 Various options are provided as possible answers to the following questions. Choose the answer and write only the letter (A–D) next to the question numbers (1.1 to 1.15) in the ANSWER BOOK, e.g. 1.16 D. 1.1 A/An … provides work for another person and remunerates that person. A employee B employer C supervisor D health and safety representative (1) 1.2 The phase difference between the voltage across the capacitor and the voltage across the resistor in an RC series circuit is … A 0° B 90° C 120° D 180° (1) 1.3 In an RLC series circuit, the total current lags the supply voltage. This is an indication that the frequency is … resonance. A below B equal to C above (1) 1.4 The total impedance in an RLC parallel circuit with a variable frequency supply is equal to the … at resonance. A inductive reactance B capacitive reactance C resistance (1) 1.5 The advantage of a field-effect transistor is that … A it has a high input resistance. B it has a low input resistance. C it draws a high current from a circuit to which it is coupled. D None of the above-mentioned (1) 1.6 The … is one of the UJT characteristic operating regions. A emitter region B positive resistance region C forward region D negative resistance region (1) Copyright reserved Please turn over

Electrical Technology: Electronics 4 DBE/November 2025 NSC Confidential 1.7 The … controls the closed-loop gain of an operational amplifier circuit. A power supply voltage B internal structure of the op amp C components in the feedback network D type of input signal applied (1) 1.8 The voltage that must be applied on pin 2 to allow the output of 555 IC to go 'low' is … A 1/3 of the supply voltage. B 2/3 of the supply voltage. C less than 1/3 of the supply voltage. D greater than 2/3 of the supply voltage. (1) 1.9 The … produces one pulse cycle of high and low when a trigger pulse is applied to its input. A astable multivibrator B monostable multivibrator C bistable multivibrator D comparator (1) 1.10 The following output signal produced by an op amp astable multivibrator has a duty cycle of … when t1 = t2. A 25% B 50% C 75% D 100% (1) 1.11 The … is used to recover a signal after it has suffered severe distortion. A inverting comparator B op amp differentiator C Schmitt trigger D summing amplifier (1) Copyright reserved Please turn over

Electrical Technology: Electronics 5 DBE/November 2025 NSC Confidential 1.12 The following is/are key in the operation of an op amp integrator circuit: A The inputs of the op amp draw zero current. B The two inputs of the op amp are viewed as both always possessing the same voltage. C When a constant current is fed to the capacitor, it will charge at a constant fixed rate. D All the above-mentioned (1) 1.13 A … amplifier has a conduction angle of less than 180⁰ of the input cycle. A class A B class B C class AB D class C (1) 1.14 Identify the oscillator that is used in signal generators above 1 MHz because of good frequency stability: A Hartley B Colpitts C RC phase-shift (1) 1.15 When the voltage gain of an amplifier is increased, the bandwidth … A is not affected. B increases. C decreases. D becomes distorted. (1) [15] QUESTION 2: OCCUPATIONAL HEALTH AND SAFETY 2.1 Explain machinery with reference to the Occupational Health and Safety Act, 1993 (Act 85 of 1993). (2) 2.2 State TWO precautionary measures to protect yourself when assisting someone that has been electrocuted. (2) 2.3 Give TWO examples of dangerous practices in the electrical workshop. (2) 2.4 Differentiate between a critical incident and an accident. (2) 2.5 In the electrical workshop, you saw one of your classmates removing a safety guard on a machine. According to the Occupational Health and Safety Act, 1993 (Act 85 of 1993), this is an unsafe act. Motivate why it is an unsafe act. (2) [10] Copyright reserved Please turn over

Electrical Technology: Electronics 6 DBE/November 2025 NSC Confidential QUESTION 3: RLC CIRCUITS 3.1 With reference to RLC circuits, state the correct terminology that describes the following: 3.1.1 The frequency at which XL is equal to XC (1) 3.1.2 The ratio of the energy stored to the energy converted by an inductor or capacitor (1) 3.2 FIGURE 3.2 below shows an RLC series circuit connected to an AC supply. Answer the questions that follow. VR = 202,16 V VL = 226,82 V VC = 140,18 V R XL = 62,83 Ω C = 100 µF IT = 3,61 A 50 Hz FIGURE 3.2: RLC SERIES CIRCUIT Given: IT = 3,61 A XL = 62,83 Ω C = 100 μF VR = 202,16 V VL = 226,82 V VC = 140,18 V f = 50 Hz Calculate the following: 3.2.1 Supply voltage (3) 3.2.2 Impedance (3) 3.2.3 Phase angle (3) 3.2.4 Capacitance value that will cause resonance (3) Copyright reserved Please turn over

Electrical Technology: Electronics 7 DBE/November 2025 NSC Confidential 3.3 Redraw and complete the voltage phasor diagram of QUESTION 3.2 in FIGURE 3.3 below in the ANSWER BOOK. IT = 3,61 A FIGURE 3.3: INCOMPLETE VOLTAGE PHASOR DIAGRAM (4) 3.4 FIGURE 3.4 below shows an RLC parallel circuit with its corresponding phasor diagram. Answer the questions that follow. IC = 0,2 A IR = 0,5 A VT = 50 V 50 Hz R L C IL = 0,9 A FIGURE 3.4: RLC PARALLEL CIRCUIT AND PHASOR DIAGRAM Given: VT = 50 V IR = 0,5 A IL = 0,9 A IC = 0,2 A f = 50 Hz Calculate the following: 3.4.1 Total current (3) 3.4.2 Capacitive reactance (3) Copyright reserved Please turn over

Electrical Technology: Electronics 8 DBE/November 2025 NSC Confidential 3.5 State whether the circuit in FIGURE 3.4 on the previous page is more capacitive or more inductive. Give a reason for the answer. (2) 3.6 Refer to FIGURE 3.4 on the previous page and explain how an increase in the supply frequency will cause the circuit to resonate. (3) 3.7 FIGURE 3.7 below shows the frequency response curve of an RLC circuit, NOT to scale. Answer the questions that follow. Zmax 70,7% 5,4 7,3 9,2 f (kHz) FIGURE 3.7: Q-FACTOR CHARACTERISTIC CURVE 3.7.1 State whether FIGURE 3.7 above represents the response curve for a series or parallel RLC circuit and motivate the answer. (2) 3.7.2 Calculate the Q-factor of the circuit. (4) [35] Copyright reserved Please turn over

Electrical Technology: Electronics 9 DBE/November 2025 NSC Confidential QUESTION 4: SEMICONDUCTOR DEVICES 4.1 Refer to FIGURE 4.1 below and answer the questions that follow. VGS Gate B A Drain VDS ID FIGURE 4.1 4.1.1 Identify FIGURE 4.1 above. (1) 4.1.2 Label A and B. (2) 4.1.3 Explain why the negative terminal of VGS is connected to the gate in FIGURE 4.1 above. (1) 4.1.4 Explain how a decrease in VGS would affect the drain current (ID). (2) 4.2 Refer to FIGURE 4.2 below and complete the output characteristic of a JFET on the ANSWER SHEET for QUESTION 4.2 and label it. I D (mA) I D (mA) -VGS (V) -6 -5 -4 -3 -2 -1 0 Transfer Characteristic Output Characteristic FIGURE 4.2: INCOMPLETE OUTPUT CHARACTERISTIC OF A JFET (4) Copyright reserved Please turn over

Electrical Technology: Electronics 10 DBE/November 2025 NSC Confidential 4.3 FIGURE 4.3 below shows a cross-section of a semiconductor. Answer the questions that follow. Source S Gate G Drain D B N A FIGURE 4.3: CROSS-SECTION OF A SEMICONDUCTOR 4.3.1 Identify the semiconductor. (1) 4.3.2 Label A and B. (2) 4.3.3 Explain why the gate terminal is electrically insulated. (2) 4.4 Explain, with reference to the construction, how the MOSFET differs from the JFET. (2) 4.5 Refer to FIGURE 4.5 below and complete the circuit diagram of a fully labelled UJT as a saw-tooth generator on the ANSWER SHEET for QUESTION 4.5. +V 0V FIGURE 4.5: INCOMPLETE CIRCUIT OF A UJT AS A SAW-TOOTH GENERATOR (5) Copyright reserved Please turn over

Electrical Technology: Electronics 11 DBE/November 2025 NSC Confidential 4.6 Draw a fully labelled symbol of a Darlington transistor. (2) 4.7 State why the Darlington transistor is mainly used in switching and amplification applications. (1) 4.8 Refer to FIGURE 4.8 below and answer the questions that follow. 8-PIN DIL PACKAGE index Indexdot dot offset null 1 8 not connected inverting input 2 77 +V 741 non-inverting input 3 6 output -V 4 5 offset null FIGURE 4.8: 741 OP AMP 4.8.1 State the purpose of the index dot on the 741 IC in FIGURE 4.8 above. (1) 4.8.2 Describe the effect the op amp will have on a sine wave applied to pin 2 in FIGURE 4.8 above. (2) 4.8.3 Explain why a 741 op amp requires a dual-rail power supply. (2) 4.9 Name the 741 op amp circuit that uses 100% feedback. (1) 4.10 The internal circuit of the 741 op amp consists of three stages, namely input stage, intermediate stage and output stage. Explain the function of the intermediate stage. (2) Copyright reserved Please turn over

Electrical Technology: Electronics 12 DBE/November 2025 NSC Confidential 4.11 Refer to FIGURE 4.11 below and complete the circuit diagram of a 741 op amp used as an inverting amplifier on the ANSWER SHEET for QUESTION 4.11. +VCC - VIN + V OUT -VCC FIGURE 4.11 (3) 4.12 FIGURE 4.12 below shows the internal layout of a 555 IC. Answer the questions that follow. +VCC A B Control voltage 8 7 6 5 5k - C1 + R Q T2 Flip- 5k flop Q S - C2 + 5k T1 1 2 3 4 Ground Trigger Output Reset FIGURE 4.12: INTERNAL LAYOUT OF A 555 IC 4.12.1 Label A and B. (2) 4.12.2 Explain why the RS flip-flop in FIGURE 4.12 above is also known as a memory cell. (2) Copyright reserved Please turn over

Electrical Technology: Electronics 13 DBE/November 2025 NSC Confidential 4.12.3 Explain why pin 4 is normally connected to the positive supply voltage during operation. (2) 4.12.4 Explain how unwanted noise from the supply can be eliminated during the operation of the 555 IC. (2) 4.12.5 Name ONE operating mode of a 555 IC. (1) [45] Copyright reserved Please turn over

Electrical Technology: Electronics 14 DBE/November 2025 NSC Confidential QUESTION 5: SWITCHING CIRCUITS 5.1 Refer to op amps as switching circuits and answer the questions that follow. 5.1.1 Name ONE op amp switching circuit that operates in open-loop mode. (1) 5.1.2 With reference to the inputs of an op amp, explain the term reference voltage. (2) 5.2 FIGURE 5.2 below shows a bistable multivibrator circuit with a 555 IC. Answer the questions that follow. + VCC R2 R1 10 kΩ 10 kΩ R3 8 4 330 Ω 7 555 3 6 2 1 5 LED Set Reset C2 0,01 µF FIGURE 5.2: BISTABLE MULTIVIBRATOR 5.2.1 Explain the purpose of resistors R1 and R2 with reference to pins 2 and 4 when the set and reset switches are open. (2) 5.2.2 Explain what would happen if resistors R1 and R2 are bypassed with pins 2 and 4 directly connected to the supply. (2) Copyright reserved Please turn over

Electrical Technology: Electronics 15 DBE/November 2025 NSC Confidential 5.2.3 Refer to FIGURE 5.2.3 below and complete the output signal for the circuit in FIGURE 5.2 on the previous page on the ANSWER SHEET for QUESTION 5.2.3. VCC Trigger input when set is pressed 0V VCC Trigger input when reset is pressed 0V VCC Output 0V FIGURE 5.2.3: BISTABLE INPUT (4) 5.3 Refer to FIGURE 5.3 below and answer the questions that follow. + 9V R2 R1 10 kΩ 58 kΩ 8 4 7 Output 6 555 3 2 R3 5 1 470 Ω Trigger input C1 C2 47 µF 0, 01 µF LED FIGURE 5.3: MONOSTABLE MULTIVIBRATOR 5.3.1 Name TWO practical applications of a monostable multivibrator circuit. (2) Copyright reserved Please turn over

Electrical Technology: Electronics 16 DBE/November 2025 NSC Confidential 5.3.2 Refer to FIGURE 5.3.2 below and draw on the ANSWER SHEET for QUESTION 5.3.2, the waveforms for the voltage across capacitor C1 (VC1) and the correlating output when the circuit in FIGURE 5.3 on the previous page is set to have a time delay of 3 seconds once the trigger input is activated. Trigger input ⅓ VCC 0V 1 2 3 4 5 t (s) ⅔VCC VC1 t High Output Low t FIGURE 5.3.2 (5) 5.3.3 Determine the threshold voltage value at which capacitor C1 will start discharging. (2) 5.3.4 Refer to FIGURE 5.3.4 below and complete the equivalent 741 op amp monostable multivibrator circuit diagram on the ANSWER SHEET for QUESTION 5.3.4. +VCC Input Output -VCC -VREF FIGURE 5.3.4: INCOMPLETE 741 MONOSTABLE MULTIVIBRATOR (5) Copyright reserved Please turn over

Electrical Technology: Electronics 17 DBE/November 2025 NSC Confidential 5.4 Refer to FIGURE 5.4 below and answer the questions that follow. +15 V VIN VOUT t -15 V R1 9 kΩ R2 1 kΩ FIGURE 5.4: INVERTING SCHMITT TRIGGER 5.4.1 Name the type of feedback used in this circuit. (1) 5.4.2 Explain the term trigger voltage with reference to the circuit. (2) 5.4.3 Determine the approximate values of the upper AND lower trigger voltages. (2) 5.4.4 Draw the output signal for the circuit in FIGURE 5.4 above on the ANSWER SHEET for QUESTION 5.4.4. (4) 5.5 FIGURE 5.5 below shows a summing operational amplifier with RF set to 100 kΩ. ALL signals on the input are pure sine waves. Answer the questions that follow. C1 R1 10 kΩ RF 100 kΩ V1 C2 R2 10 kΩ +12 V - V2 C3 R3 10 kΩ + VOUT -12 V V3 FIGURE 5.5: SUMMING AMPLIFIER Given: R1, R2, R3 = 10 kΩ RF = 100 kΩ (variable) V1, V2, V3 = 0,4 V Copyright reserved Please turn over

Electrical Technology: Electronics 18 DBE/November 2025 NSC Confidential 5.5.1 Explain ONE characteristic that makes this type of circuit suitable for use in audio mixing applications. (2) 5.5.2 Calculate the output voltage of the circuit if RF is set to 100 kΩ. (3) 5.5.3 Calculate the voltage gain of the amplifier. (3) 5.5.4 When V2 is increased to 0,6 V, the calculated output changes to -14 V. Answer the following questions: (a) Describe how the shape of the output signal will change when V2 is increased to 0,6 V. (2) (b) Explain why the output signal was affected in QUESTION 5.5.4(a). (1) (c) State how the change in signal shape can be fixed without decreasing the value of any of the inputs. (1) 5.6 Refer to FIGURE 5.6 and answer the questions that follow. RF CIN +V VIN - +V VOUT Input + t -V -V FIGURE 5.6: OP-AMP DIFFERENTIATOR 5.6.1 Determine the voltage at the inverting input terminal of the op amp before the input signal is fed into the circuit. Motivate your answer. (2) 5.6.2 Explain the relationship between the input and output voltage of the circuit in FIGURE 5.6 above. (2) [50] Copyright reserved Please turn over

Electrical Technology: Electronics 19 DBE/November 2025 NSC Confidential QUESTION 6: AMPLIFIERS 6.1 Briefly describe the purpose of an amplifier. (2) 6.2 Refer to FIGURE 6.2 below and answer the questions that follow. IC(mA) IC(mA) IC(mA) Saturation Saturation Saturation Q2 Q3 Q1 VCE VCE VCE (A) (B) (C) FIGURE 6.2: DC LOAD LINES 6.2.1 State the class of amplification represented by FIGURE 6.2(A) above. (1) 6.2.2 Explain why the positive half-cycle is distorted in FIGURE 6.2(B) above. (2) 6.2.3 Identify the class of amplification at FIGURE 6.2(C) above. Motivate your answer. (3) Copyright reserved Please turn over

Electrical Technology: Electronics 20 DBE/November 2025 NSC Confidential 6.3 Refer to FIGURE 6.3 below and answer the questions that follow. +VCC R 1 = 10 k RC = 1 k C 2 = 10 µF C 1 = 10 µF Q1 AC VOUT R =5k 2 Supply RE = 2 k C E = 100 µF 0V FIGURE 6.3: RESISTOR CAPACITOR-COUPLED AMPLIFIER 6.3.1 State how the reactances of the coupling (C1 and C2) and decoupling capacitor (CE) will be affected at lower frequencies in FIGURE 6.3 above. (1) 6.3.2 Explain the function of R1 and R2 in FIGURE 6.3 above. (2) 6.3.3 Calculate the circuit's gain in decibels if the circuit produces 3 W of sound when the input power is 6 W. (3) 6.3.4 Explain why R1 and C1 are referred to as a low-frequency filter. (3) 6.3.5 Draw the output waveform of the emitter amplifier on the ANSWER SHEET for QUESTION 6.3.5. (3) Copyright reserved Please turn over

Electrical Technology: Electronics 21 DBE/November 2025 NSC Confidential 6.4 FIGURE 6.4 below shows an amplifier circuit diagram. Answer the questions that follow. R1 Transformer R3 Speaker T1 Transformer T2 Q1 Q2 C2 C3 R2 RE1 C1 R4 RE2 0V FIGURE 6.4: TWO-STAGE TRANSFORMER-COUPLED AMPLIFIER 6.4.1 State the function of transistor Q1. (1) 6.4.2 State TWO applications of the circuit in FIGURE 6.4 above. (2) 6.4.3 Describe the advantage of using a transformer-coupled amplifier over a resistance-coupled amplifier. (2) Copyright reserved Please turn over

Electrical Technology: Electronics 22 DBE/November 2025 NSC Confidential 6.5 Refer to FIGURE 6.5 below and answer the questions that follow. +VCC T2 R1 C1 C2 Output T1 Q1 Input R2 C3 R3 CE 0V FIGURE 6.5: RADIO-FREQUENCY (RF) AMPLIFIER 6.5.1 Explain how the circuit in FIGURE 6.5 above is made more frequency selective. (1) 6.5.2 Describe the primary function of the impedance matching network in an RF amplifier. (2) 6.5.3 Describe how the circuit in FIGURE 6.5 above amplifies the input signals. (3) Copyright reserved Please turn over

Electrical Technology: Electronics 23 DBE/November 2025 NSC Confidential 6.6 FIGURE 6.6 below shows the circuit diagram of a Hartley oscillator. Answer the questions that follow. + VCC RF choke C2 C4 R1 output C3 Q1 L1 R2 R3 C5 C1 0V L2 FIGURE 6.6: HARTLEY OSCILLATOR 6.6.1 Name the type of feedback the Hartley oscillator requires to oscillate. (1) 6.6.2 State the primary function of the tank circuit in the Hartley oscillator. (1) 6.6.3 Explain how varying the value of capacitor C1 in the tuned circuit affects the frequency of operation. (2) Copyright reserved Please turn over

Electrical Technology: Electronics 24 DBE/November 2025 NSC Confidential 6.7 Refer to FIGURE 6.7 below and answer the questions that follow. +V +V L= C= 300 mH 200 µF 0 Time 0V -V (X) (Y) FIGURE 6.7: TANK CIRCUIT DIAGRAM 6.7.1 Identify the waveform in FIGURE 6.7(Y) above. (1) 6.7.2 State how a reduction of the amplitude of the sinusoidal wave in FIGURE 6.7(Y) above can be prevented. (1) 6.7.3 Explain the following terms with reference to FIGURE 6.7 above: (a) Electrostatic charge of the capacitor (1) (b) Electromagnetic charge of the inductor (1) Copyright reserved Please turn over

Electrical Technology: Electronics 25 DBE/November 2025 NSC Confidential 6.8 Refer to FIGURE 6.8 below and answer the questions that follow. +VCC RB RC C5 VOUT C1 C2 C3 Q1 R1 R2 R3 R4 C4 0V FIGURE 6.8: RC PHASE-SHIFT OSCILLATOR 6.8.1 Explain the purpose of variable resistor RC. (2) 6.8.2 State the function of R4 and C4. (2) 6.9 Differentiate between oscillators and amplifiers with reference to the feedback used. (2) [45] TOTAL: 200 Copyright reserved

Electrical Technology: Electronics DBE/November 2025 NSC Confidential FORMULA SHEET RLC CIRCUITS SEMICONDUCTOR DEVICES P = V I Cos θ VOUT R RF XL = 2πfL Gain A V = =− F OR AV = 1+ VIN R IN R IN 1 RF XC = VOUT =VIN × �- � 2π fC RIN fr = 1 OR fr = f2 + f1 RF 2π LC 2 VOUT = VIN �1+ � fr RIN BW = OR BW = f2 − f1 Q SWITCHING CIRCUITS Series  R R R  VOUT = −  V1 F + V2 F + ...VN F  VR = I R  R1 R2 RN  VL = I XL VOUT VOUT Gain A V = = VC = I X C VIN (V1 + V2 + ...VN ) VOUT = − ( V1 + V2 + ...VN ) R2 V =FB VSAT × VT R1 +R2 IT = OR IT = IR = IC = IL Z R2 V= TRIG VOUT × R1 +R2 AMPLIFIERS V Z = R 2 + (X L − X C ) 2 IC = C VCC = VCE + ICRC RC VR + (VL − VC ) OR 2 2 VT = VT = I Z VB = VBE + VRE R OR Cos θ = VR OR Tan θ = VL - VC AV = VOUT Cos θ = Z VT VR VIN XL X C VL VC 1 L I Q= = = = = A I = OUT R R VT VT R C IIN Parallel POUT AP = OR AP=A V× A I VT = VR = VL = VC PIN VT IR = βT = β1 x β2 OR A VT = A V1 × A V2 × A V3 × ...A Vn R PIN = I2 × Z IN AND POUT = I2 × Z OUT VT IC = R1 R2 XC =V1 × VCC =V2 × VCC R1 +R2 R1 +R2 Copyright reserved

Electrical Technology: Electronics DBE/November 2025 NSC Confidential VT Oscillation frequency IL = 1 1 XL fo = OF fo = 2 × π LCT 2 × π 6 RC 2 IT =�IR + (IC - IL )2 1 fo = 2 × π LTC GAIN IN DECIBELS VT I Z= A I = 20log10 OUT IT IIN I VOUT Cos θ = R A V = 20log10 OR A V = 20log 10 A VT IT VIN R R POUT P2 Q= = A P = 10log10 OR A P = 10log10 XL X C PIN P1 Copyright reserved

Electrical Technology: Electronics DBE/November 2025 NSC Confidential CENTRE NUMBER: EXAMINATION NUMBER: ANSWER SHEET QUESTION 4: SEMICONDUCTOR DEVICES 4.2 I D (mA) I D (mA) -VGS (V) -6 -5 -4 -3 -2 -1 0 Transfer Characteristic Output Characteristic Transfer mark to answer book MOD FIGURE 4.2 (4) Copyright reserved

Electrical Technology: Electronics DBE/November 2025 NSC Confidential CENTRE NUMBER: EXAMINATION NUMBER: ANSWER SHEET 4.5 +V 0V Transfer mark to answer book MOD FIGURE 4.5 (5) 4.11 +VCC - VIN + V OUT -VCC Transfer mark to answer book MOD FIGURE 4.11 (3) Copyright reserved

Electrical Technology: Electronics DBE/November 2025 NSC Confidential CENTRE NUMBER: EXAMINATION NUMBER: ANSWER SHEET QUESTION 5: SWITCHING CIRCUITS 5.2.3 VCC Trigger input when set is pressed 0V VCC Trigger input when reset is pressed 0V VCC Output 0V Transfer mark to answer book MOD FIGURE 5.2.3 (4) 5.3.2 Trigger input ⅓ VCC 0V 1 2 3 4 5 t (s) ⅔VCC VC1 t High Output Low t Transfer mark to answer book MOD FIGURE 5.3.2 (5) Copyright reserved

Electrical Technology: Electronics DBE/November 2025 NSC Confidential CENTRE NUMBER: EXAMINATION NUMBER: ANSWER SHEET 5.3.4 +12 V Input 2 7 6 Output 3 4 -12 V -VREF Transfer mark to answer book MOD FIGURE 5.3.4 (5) Copyright reserved

Electrical Technology: Electronics DBE/November 2025 NSC Confidential CENTRE NUMBER: EXAMINATION NUMBER: ANSWER SHEET 5.4.4 VIN Boonste Upper snellervlak trigger level 0 t Onderste Lower snellervlak trigger level +V VVOUT UIT 0 t -V Transfer mark to answer book MOD FIGURE 5.4.4 (4) Copyright reserved

Electrical Technology: Electronics DBE/November 2025 NSC Confidential CENTRE NUMBER: EXAMINATION NUMBER: ANSWER SHEET QUESTION 6: AMPLIFIERS 6.3.5 0V t 0V Transfer mark to answer book MOD FIGURE 6.3.5 (3) Copyright reserved